Sometimes it matters other times not. If you want absolute performance then it doesn't matter, if you want efficiency then it does.

Add 50 more PCIe lanes, double the bus width, 270mb of cache, 60 cores and a communication protocol then get back to me.

Anandtech ran the numbers a couple years ago and an EPYC processor spent around 60% of its budget on Infinity Fabric (up to 90% of used power with only a couple cores being used).

An M2 based chip might get more done, but it won't use much less power. In truth, I'd guess there's a good chance it bottlenecks on the IO and performance doesn't increase as expected (without widening IO further with all the extra power costs).