Windows for Arm on M1 Mac Successfully Virtualized
macrumors.com
macrumors.com
I’m looking forward to it!
Until that changes I don't see much point of ARM as it will only erode the PC that we have become accustomed to. I'd much rather live in an x86-only ecosystem than one without choice.
(and neither are the Arm Chromebooks by the way too)
That's "locked down" if I can't run a kernel I compile.
Every single one of them does. Just switch to the UEFI Setup and disable Secure Boot.
Note that I'm talking about Arm 64-bit Windows, and not the earlier Windows RT which is dead. Details for Linux for the best-supported Windows on arm64 laptops on that front at: https://github.com/aarch64-laptops/build
It looks like they walked some of that back at some point.
That limitation only applied on 32-bit Arm systems (Windows RT & Windows 10 Mobile, ARM != ARM64)
Here, Apple doesn't prevent it in any way, and drivers can be developed. (drivers not present in Linux is not and will never mean that a device is locked down, don't stretch things please)
By that definition 99.99% of devices are open because you can just swap out the rom. All you need to do is figure out the pin and wiring and the serial protocols involved in communicating. My ducky keyboard is NOT open even though I replaced the firmware with my own.
What kind of insane logic is that?
And the fact that you and the other person here keeps conflating ANY documentation about ANY part of the hardware as contributing to Linux is even more ridiculous.
FWIW, the person you’re responding to is contributing to Linux for this hardware, so I wouldn’t grill them on conflating things ;)
The irony is that the jailbreaking crowd has spend so much time trying to break into apple devices that in comparison this now seems open.
EDIT: Also can we stop pretending that english isn't english and the opposite of locked isn't unlocked/open?
Not to mention that apple can silently overwrite this at any point in time with a MacOS update. As they have done so before leaving plenty of macs bricked because of broken SPI flash[1].
I share the excitement for the M1 chip, but you would have to be blind not to see this as troubling for the future of open computing.
https://www.softwarefreedom.org/blog/2012/jan/12/microsoft-c...
"[...] But for ARM devices, Custom Mode is prohibited: “On an ARM system, it is forbidden to enable Custom Mode. Only Standard Mode may be enable.” [sic] Nor will users have the choice to simply disable secure boot, as they will on non-ARM systems: “Disabling Secure [Boot] MUST NOT be possible on ARM systems.” [sic] Between these two requirements, any ARM device that ships with Windows 8 will never run another operating system, unless it is signed with a preloaded key or a security exploit is found that enables users to circumvent secure boot."
This never applied to ARM64 Windows, ever.
A fast processor and a machine that doesn't heat up are customer facing too.
The whole point of iOS is simplicity and ease of use. That is the feature.
iPhone still not switched to USB-C (maybe they never will) and it is a big mistake for Apple.
They will have to, the EU will force them.
Which will still be nice from a standards perspective, since the iPhone uses the Qi standard.
https://www.theverge.com/2020/10/13/21514850/apple-iphone-12...
And it's true that Microsoft didn't invent pressure sensitive pens — Wacom did — but MS did pioneer integrating pressure-sensitive pen systems as part of the computer as opposed to requiring optional add-on hardware like the original Wacoms. Similarly, Apple didn't invent WiFi, or USB, or any of the things the poster I was responding to claimed; they just adopted them and made Apple devices support the technology by default — the claim was "no one adopts a new technology in the PC world until Apple gives it social proof." So: some counterpoints.
(Also, "failed tablet/laptop hybrids"? Pretty sure the Surface hardware hasn't failed — most recent quarterly revenue for the Surface division was about $2 billion. And it spawned a legion of tablet/laptop hybrids in the Windows ecosystem — pretty much every laptop maker for Windows offers a touchscreen laptop, and they're fairly popular. Even Chromebooks often have touchscreens. Apple is way behind on this one.)
Hopefully this lights a fire under some of the other chipmakers and they’ll adjust course, but we’ll see.
In the meantime, it’s almost embarrassing for the rest of the industry just how far ahead Apple’s chips are. It’s been that way in smartphones for a long time now, and now it’s coming to laptops and desktops.
This new one (5800U) was not yet officially announced.
For the Ryzen 7 4800U, that's just 1.8GHz. 4.2GHz which is the turbo clock blows through that limit by a lot. (of course that's for multi-core workloads)
For Ryzen 5th generation, we have this for per-core only power draw, without the I/O: https://www.anandtech.com/show/16214/amd-zen-3-ryzen-deep-di...
We can see from the graph at https://images.anandtech.com/doci/16214/PerCore-1-5950X_575p... that to reach 6.6W per core, the clock has to fall to 3.8GHz. At such a clock, Zen 3 is way behind the Apple M1 performance wise.
Now, if only AMD could bring back that ARM Zen design that they cancelled a few months before Ryzen 1st Gen...
Go beyond that and the power usage balloons quickly (won't repeat myself, see my other comment on this thread at https://news.ycombinator.com/item?id=25231798).
On laptops, more power efficiency maps directly to increased performance (turbo clocks provide higher performance in bursts or at the expense of your laptop's fans sounding like a jet turbine).
Oh yes that would rock and open up a whole new level of fault tolerance as could run real-time upon two different CPU cores in parallel, which for some workloads would add value.
Certainly adding an ARM chiplet would be cool and technically doable, though so would a RISC V core and if Nvidia buy ARM then that choice may become political.
If? Was that a typo? They have indeed [https://nvidianews.nvidia.com/news/nvidia-to-acquire-arm-for...]
Truly the goal posts are always moving.
There is a fair chance the M1 will be remarkable in how little impact it has on the rest of the industry.
So my thoughts were: cool, Apple is bringing some of the processor developments to mass market that I didn't think would hit the market for another 5 years. I am just a bit sad to see everyone (esp on HN) saying it was never seen before.
Sounds like part of the special sauce in the M1 is bringing supercomputer architecture to laptops. That seems like an amazing feat too.
Also, I don't think I was "screaming" about "100 years". Maybe you are thinking of someone else's comment?
Don't count on the Mediateks of the world to spend any time on this market. Most of the licensees are focusing on high volume embedded cases where they an try to drag themselves above the commodity pricing floor by providing a package of SoC and (in my experience crappy) drivers and an android port. In fact "package" is the key word: they typically won't sell you the chip in a useful way (i.e. no data sheets) but instead want to sell you a reference board with ported software running on top.
Apple is unusual in that they have two value add products that matter and have managed to, over time, build the capability to handle it. The economic calculus for them is quite different from that of the merchant chip vendors.
There are a few possible alternatives like Qualcomm and Nvidia (!!) but the market dynamics aren't the same for them.
It is possible that an Nvidia/microsoft relationship could develop somewhat similar to the Intel/Mcrosoft partnership, but unlikely. The market is different and the regulatory environment may become different. Terminal devices (laptops, desktops, phones) aren't really where the money is any more (except for Apple, an exception on several dimensions) so the push for such a partnership is diminished.
More likely is a partnership addressing cloud datacenters between say MS or Amazon and Nvidia, but nobody is going to be willing to allow one chip vendor to have any say over their destiny. It would make sense for one of the top cloud vendors (AWS, Azure, IBM) to buy Nvidia but that would never be allowed.
That has always been a question of when, not if. And M1 shows that it is quickly approaching. In a market where physical limits have slowed down miniaturization, with just 5-10 years away from a standstill, a low efficiency instruction set focused on backwards binary compatibility is going to get washed out of most usecases very quickly. It's going the way of the IBM mainframe - still sold decades after its heyday, but marginalized to a niche (bunch of enterprise cloud instances for software that is too expensive to recompile/port).
M1's awesomeness has to do with:
- assembling a killer team - 5nm process - high speed, low latency DRAM - big-little
The only substantive difference between the AMD64 and ARM64 instruction sets is that ARM64 has a more relaxed memory model.
2. Decoding took a significant portion of the chip when they were a million transistors. The m1 has 16 billion resistors, decoding is a much less significant fraction of the chip.
And sure, there's pipelining but than your limited by latency.
http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39...
It's a little confusing still why they sold the whole thing while the market was growing.
Marvell seemingly abandoned portable devices and rolled IXP(?) into their own lines for a time.
A good part of why they take such a beating in x86 too, Intel has no backup plan because they're scared of their own backup up, while being oblivious to the fact that it was their backup plan that saved them during the post-P4 era.
At least AMD is not scared of throwing away their arch every few years and restart, they've pretty much been doing that like clockwork every five years for the past two decades.
Cough cough Itanium is an Intel-HP collaboration cough cough
https://www.zhihu.com/question/414069789 (needs Google Translate)
Was AMD's K12 related to Zen in any way? AMD's predecessor to that, the Opteron A1100 series, was bog standard Cortex A57 cores. I figured K12 would be at best an evolution of a standard ARM design, but if it was more that would be very interesting. Would love to know more about this.
At same clock frequency t he Zen3 would have been destroyed by the M1
It would be more accurate to describe Apple was the only customer willing to pay and has enough volume.
In addition, I think Nvidia's tendency toward extreme secrecy would quickly become an obstacle.
Let's at least compare apples to apples. Pun intended.
In the case of collaborations between separate companies, secrecy becomes a problem because inevitably, details that are held close and not communicated turn into stumbling blocks. For a collaboration between Nvidia and Microsoft for instance, the teams at Microsoft involved with the project would need the same level of access to Nvidia's half as Nvidia's employees do in order to be as effective as Apple's internal teams have been. This isn't impossible of course, but historically Nvidia is not inclined to do things like this.
The question further is this model extended to say china. Many things happened in china was closed to outside. Not much as a secret but more like a big firm operate cheaply in a world economy. Would others compete or like apple others have to follow inline to get the supply. One wonder.
A side point: it was the patent clause of the GPL v3 that frightened them off. The GPL doesn’t require “upstreaming” of anything — you merely have to release the source code you used; any use of that code by another person is that person’s responsibility.
More generally on Apple: they just treat open / proprietary as another tactical tool. When they were on the ropes (e.g. late 90s) they happily embraced open standards like mp3 and jpeg, yet also happily purchased a license to .rtf. They quickly realized the ipod needed Windows support. Then as (and where) they became stronger they stoped caring.
The rest of faang must find a way to catch up. They will already pay huge amounts in the meantime giving Apple even greater latitude to win coming new markets.
There’s also clear opportunity for Apple to enable developers with cheaper services than other providers. This is a major issue for Amazon and Microsoft.
Except Apple generally delivers subpar services. I say this as an iPhone/Mac user.
https://www.protocol.com/apple-hires-cloud-open-source-engin...
How well is this chip suited for development? E.g. how fast can it do a full parallel compile of (say) gcc, compared to an Intel/AMD machine?
Since Rust is LLVM-based, there should be a substantial performance improvement for Clang as well.
Because that's what counts for me, as a developer.
For what it's worth, this guy noticed a nearly 2x speedup in compiling OpenSSL, which is C code, so I assume GCC or Clang: https://twitter.com/sandofsky/status/1331732592958214145
This suggests, though it does not prove, that the performance improvement for code compilation is likely not exclusive to a single language.
>After a single build of WebKit, the M1 MacBook Pro had a massive 91% of its battery left. I tried multiple tests here and I could have easily run a full build of WebKit 8-9 times on one charge of the M1 MacBook’s battery. In comparison, I could have gotten through about 3 on the 16” and the 13” 2020 model only had one go in it.
https://techcrunch.com/2020/11/17/yeah-apples-m1-macbook-pro...
That sounds absolutely fascinating. Do you have any references I could read further on that?
I'm not willing to describe M1 as "untouched" without actually using it in the real world for a couple of weeks.
My question to you is, have you used M1 in the real world for a couple of weeks, or are you basing your comments on the benchmarks that have been published by tech journalists?
What you’re describing at the store is standard procedure for a retail location during the pandemic. Easy enough for you to make a shopping appointment if you’re actually interested.
Personally, I’m holding out for Parallels. I have some Windows-only software that’s required for work; even after Parallels with Windows on ARM64 is available, I’ll have to see about having that software recompiled for ARM64 or if it will run under Microsoft’s x64 emulation in Parallels.
My other Mac is a 2013 Mac Pro that still works fine, but I am curious to compare compiling benchmarks with the new Mini. Maybe by the 2nd gen with more RAM is released, it will be qualified for corp use.
There are lots of great apps on all these platforms that do all kinds of excellent useful stuff.
Regarding programming for ARM, last I checked you can just specify the target architecture in Go or Rust and off it goes. For C and C++, it’s as easy as sudo apt-get install gcc-arm-linux-gnueabihf
If you’re waiting for systems like this that can run FreeBSD, well, you’re in for a wait. How long is the actual point of my post - who knows when hardware of this caliber with open drivers will be available or common.
Also - smartphones use ARM cpus and those have been a mature gaming platform for years. I'd say that a mainstream gaming console based on ARM would not change much, just like Xbox 360, PS3, Wii and Wii U did not cause PowerPC to rise in general popularity,
I think gp means a performance-focused console on ARM, not nintendo or mobile.
Not quite. Their last three consoles (Wii, Wii U, and Switch) were about a generation behind their competition, but the first four (NES, SNES, Nintendo 64, and GameCube) were comparable to their rivals.
I hope recent software advances in ARM by Apple pushes Microsoft to focus more of their efforts in building a competent translation software layer for x86-64 apps (in contrast to their current garbage-ish emulation layer that makes their ARM devices running legacy x86-64 apps nearly unusable, in some cases) like Rosetta 2.
And also hoping those advances by MSFT in turn push Apple to make an even better version of Rosetta 2 (because mainstream x86-64 apps will probably be around at least for the next couple of decades, imo), leading to a 'golden age' of sorts for translation/emulation software.
The problem is that having a 30% performance penalty on a Snapdragon 8cx (because Arm only started really caring about fast CPUs starting from the Cortex-A76, which is the first generation stemming from that effort, resulting in not-ideal perf characteristics for x86 emulation) results in not very good performance. This can only be fixed through better, smarter Arm hardware. (which is coming)
The thing holding back Windows on ARM is one of the key selling points of Windows: all your legacy programs just work. Windows is far, far superior in this over macOS and even Linux [1]. Windows 1.0 apps run on a modern Windows 10 install. For that to be a thing on Windows on ARM, you need high emulation performance. The Snapdragons that Windows on ARM devices come with just are not up to that task at all.
Making Windows on ARM more enjoyable to use and more accessible to developers (which are more likely to have Macs than underpowered niche devices) should really incentivize Microsoft to get Windows to run on ARM Macs at least using virtualization. Virtualization on Apple Macs is solving a supply problem of high performance, reasonably easy to buy hardware for both Microsoft and Linux distros aiming to work well on ARM.
[1]: Although ironically, Wine on Linux/Mac is often even better at running legacy Win32 programs than Windows is. But I digress.
Is there anything stopping MS from copying Apple's approach?
I know Rosetta 1 was technology licenced from Transitive Corporation, is Rosetta 2 completely Apple in-house tech?
One thing I don't completely understand about Rosetta2 is when it performs static recompilation and when it's doing dynamic recompilation. I'm under the impression that a lot of Rosetta2's magic is in static recompilation. I don't know in which cases it statically recompiles and in which cases it dynamically recompiles though. If anyone knows anything about this I'd really like to understand this better.
If my hunch about Rosetta2 focusing largely on static recompilation is correct, Microsoft can't copy this approach easily. Static recompilation is very hard to make reliable. It's probably doable in Apple's use case (doable, definitely not easy), where their only aim was probably to make everything that runs on Intel-based Catalina or Big Sur on Apple Silicon. However, Intel-based 64-bit Windows 10 can (attempt to) run all 32-bit Windows software made since Windows 95. That's a much wider and diverse range of software, and the only approach to make that reliable is to depend on the slower dynamic recompilation.
If my hunch about Rosetta2 is not correct, and it's achieving these performance numbers on pure dynamic recompilation, all I can say is hats off to Apple. Microsoft would do good to pay them a large amount of money to license their tech in that case (or to copy as much of their approach anyway).
That was x86 on x86, but it took a similar level of sophistication then as with cross-architecture "software virtualisation" now to run all 32-bit Windows software, as well as all 16-bit software, other OSes such as Linux, BSD and MS-DOS and Netware, etc.
Considering all the things around like self-modifying code, generated code, thunks etc in Windows and other OSes and applications, VMware did a great job of scanning all code for entry points, intercepting every path that couldn't be executed directly, patching what needed to be patched.
I expect they can revive that approach with cross-architecture translation now, and I would be very surprised if VMware and Parallels are not working on exactly this for x86-on-ARM VMs right now.
This is purely speculative but I would assume that it statically recompiles the __TEXT segment of binaries or maybe whatever it can easily figure out is code by following all possible jumps, etc.
Then, whenever a page is mapped as executable they could then check if this is part of a memory mapped binary which is statically recompiled or otherwise recompile the code in the page and jump to the now native version.
That way JITs should work without fully falling back to interpreting instructions. Things would get tricky when you map some memory both writable and executable, but maybe they're pushing the limits on what the spec allows for instruction caches? I'd have to check my x86 reference manual. Or maybe this is another area where they have some hardware primitive to facilitate a partial recompilation.
Interestingly, ARM to X86 is probably easier because ARM has a machine readable specification (I don't think Intel or AMD have an equivalent)
Dynamic binary translation (a predecessor of modern JIT) is a completely different story, though.
Now, a few years back, Apple introduced iOS app uploads in Bitcode. Bitcode is the LLVM's own intermediate representation of the abstracted LLVM ISA. Apps available in Bitcode, when downloaded, are statically compiled into the ISA of the actual CPU one's iPhone has. Again, apps uploaded in Bitcode in 2018, will run fast and effeciently on iPhone 18 as well. I could immediately draw parallels with AS/400 a few years back when Apple announced the Bitcode availability.
I could not quickly check whether Bitcode was available for OS X apps today as well, but it would be hard to imagine why Apple would not want to extend the approach to the OS X apps as well. This is where it can get really interesting as apps available through the OS X app store in Bitcode, could be developed and compiled on a device running on the Intel ISA, but they could also be statically translated into M1 (M2, M3 etc) ISA at the download time and, at least theoretically, they would not require a separate ARM / M1 app image (or a universal binary for that matter). Unless, of course, the app leans on something x86 specific.
I am on the hunch that the real disruption that Apple has inflicted upon the industry is not just a stupendously fast and power efficient chip (it is very nice but secondary), but the concept of the demise of the importance of hardware ISA's in general – use the intermediate code representation for app binary images and use whatever CPU / hardware ISA that allows to realise the product vision. It is ARM today but it can be anything else 10 years down the road. I wonder who can push the mainstream PC industry in a similar direction and successfully execute it, though.
clang compilers (or other LLVM based language/compiler frontends) generate the LLVM IR, apply optimisation passes and run the LLVM IR through the architecture specific backend that transforms the LLVM IR into the underlying hardware ISA (or into a target ISA when cross-compiling). The original meaning of LLVM was «Low Level Virtual Machine». It is a widespread approach found in many cross-platform / portable compilers, e.g. GNU has RTL.
Here is an example of the «Hello world» using the LLVM IR; there is nothing architecture specific about it:
------
@.str = private unnamed_addr constant [13 x i8] c"Hello World\0A\00", align 1
; Function Attrs: nounwind ssp uwtable
define i32 @main() #0 {
%1 = alloca i32, align 4
store i32 0, i32* %1
%2 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0))
ret i32 0
}declare i32 @printf(i8*, ...) #1
------
Seamless tranlastion of Bitcode into an Intel or ARM ISA actually works, too: https://www.highcaffeinecontent.com/blog/20190518-Translatin...
Lastly, Bitcode and Rosetta are mutually exclusive. If the app is available in Bitcode, it is run through an optimising hardware ISA backend at the download time and then runs always natively, whereas Rosetta runs existing x86 apps through the static binary translation into ARM first (what Apple refer to as AOT - ahead of the time) and likely uses JIT when the recompiled application is run.
Source?
Without this mode, multi-threaded ARM code emulating x86 by translation needs to contain a very large number of barrier instructions.
edit: dunno how to feel about getting downvoted into oblivion for this thread, on one hand, it seems really cynical for people to read me as...masterminding some way to make someone smart look foolish?...when I'm legit asking qs - I don't have a CS degree and clearly don't understand some of the formal terms around CPUs, but I'm trying! :)
First, you wrote "M1 has instruction-level x86 emulation" as an authoritative sounding statement, as if it's true.
When you also talked about Qualcomm and MediaTek having to add lots of complexity and deal with legal pitfalls, that added to the idea that you really did mean a full x86 instruction decoder, because that's where the legal pitfalls are expected to be.
But it's false, the M1 doesn't do instruction-level x86 emulation, so that's a minor irritation. Comments don't usually get downvoted over a simple mistake, but they do if it looks like someone is saying something really misleading.
But then in response to being told it doesn't do that, you wrote "so, it does? thanks for clarifying!".
That language read like you were being snarky. The phrasing "so, it does?" in response to a correct "It doesn't." is typical English snark, a way of sounding dismissive and challenging at the same time.
That interpretation invited a downvote.
Once you have been perceived as snarky, following it with "thanks for clarifying!" is doomed to come across as more snark. The exclamation mark makes this worse.
If you are legit just curious, then I think what has happened is you did not understand that "instruction-level x86 emulation" is a very different thing than "memory ordering", stating the former to be something the M1 does is misleading, and you did not realise you had written something that came across as snark.
I'll legit try to explain the difference in case you're interested.
A CPU doing x86 emulation at the instruction level would have the chip decode x86 machine instructions in hardware one by one and perform the operations they describe. The M1 doesn't have hardware to decode x86 though; neither does any other ARM CPU. It could be built, but nobody has, probably for legal reasons not technical reasons.
For memory ordering, we probably wouldn't call it emulation. All multi-core CPUs have a memory ordering model, but different architectures have different models. This means how memory accesses (reads and writes) in programs running on one core are observed by programs on other cores running in parallel and doing memory accesses to the same locations. (On single-core CPUs it is irrelevant because normal CPU cores always observe their own reads and writes in program order.)
It's probably not obvious how memory accesses can be observed out of order. It happens because at some level, reads and writes inside a CPU are not instantaneous. They become messages back and forth with the memory, messages take time to travel, and these messages get even more complicated when there are different kinds of caches all over the place as well. With multiple cores sending and receiving memory messages, each of these taking time to travel, the result is cores see memory messages in a different order from each other. Rather than explain, I'll link to the Wikipedia article: https://en.wikipedia.org/wiki/Memory_ordering
ARM generally has a weak memory model, which means the order of instructions in a program on one core has little effect on the order of memory accesses seen by other cores. This is too weak for some things to work (like locks between parallel threads), so there are also barrier instructions which force all memory accesses before and/or after the barrier to be visible to programs on other cores in the order of instructions, as long as the programs on the other cores also use barriers.
On x86 you don't need barriers, because the ISA is defined (due to the history of CPUs) so that all memory accesses by each core are visible to all the others in the exact order of instructions run by each core. (There are some exceptions but they don't matter). This is a great illusion, because in reality to stay fast there are memory access messages flying around inside the CPU and between the cores and caches, getting out of order in large queues. To maintain the effect as if everything is in order needs a bunch of extra transistors and logic on the chip, to keep track of which messages have to be queued up and waited for before others.
This is why when x86 programs are translated into ARM programs (by Rosetta 2 software), if it's for a multi-threaded program the ARM code needs a lot of barrier instructions all over the place, and these tend to be slow because the chip isn't optimised for lots of barriers.
On the M1, it has a non-standard (for ARM) operating mode where the weak order switches to program order, like x86. For this to work it needs extra logic on the chip. It seems that the M1 doesn't use this extra logic all the time though, only when Rosetta 2 is using it. Probably because it slows things down a bit to turn it on.
So when x86 programs are translated into ARM programs (by Rosetta 2 software) it doesn't need to include lots of barrier instructions. Maybe not any. The resulting code which runs on the M1 is ARM code (not x86 code), but it's special ARM code because if it's run in parallel with other ARM code accessing the same memory on another core, it only runs correctly when the M1 turns on the non-standard program-order memory mode, which slows the CPU a little.
Which makes me wonder: do the new M1 devices support booting alternate OS's in their current form right now? Or are they as locked down as iOS?
Does the M1 have a hardware suite for virtualizing x86 instructions? Or is there a software conversion of x86 to ARM going on? Or?
Apple has their own version of such support named Rosetta 2, it uses a combination of static recompilation and emulation to run x64 macOS apps on ARM hardware. Both systems have about 20-40% performance hit when emulating x86/x64 on ARM.
For one, it only supports 16GB or RAM ATM. That's.. Not a lot. Maybe they only did it for batter life. Maybe they will allow more in the future. But you can only get an M1 with what Apple sells you, and the future means comparing to what's available from AMD and Intel at that time as well.
No support for discrete GPU. They have some onboard support for ML workloads(which might actually be inflating their benchmark numbers a bit) but it's only comparable to entry level GPUs apparently(sub 200).
Most reviews seem overly focused on Geekbench results and seem very lacking in intensive real world workloads(like photoshop, after effects, etc etc). Cinabench seems to tell a different story ATM. The latest top-end AMD mobile CPUs seem to smoke it on multi-core perf. And the new 5800U is not far off in single or multi-core perf. Will need to wait and see how real world perf actually compares across the board.
Overall I see this as a first step with some impressive FUTURE implications for the industry, but it's not putting all the competition in its shadow. Apple will have flexibility controlling their chip designs and, perhaps more importantly, they stand to save billions moving away from Intel. It's telling though that the M1 is limited to the 13" MBP ATM, and I'd give it a pass for my current processing needs. Squarely in early adopter zone.
This is my main concern. I’m still on the edge about getting an M1 device since I plan on mainly using it for iOS stuff and casual usage and have plenty of PCs for my hacking ventures, but I’m used to having 64GB and would hate to join the ranks of people who complain about Electron ;)
But most of those mentioned; Photoshop, Video Editing, and even Code compiling has been well tested already.
(Also, anecdotally, I don't understand why HN keeps saying 16GB of RAM isn't a lot. I just upgraded my home desktop to 16 GB, and only because I also upgraded my screen from 1080 to 1440, and videogames were dipping below 60fps. Sure, at work my desktop has much more RAM, but for a laptop? 16 GB seems fine.)
On GPU: There's been some speculation that the eGPU's don't work due to driver support, not hardware issues. Once again, I wouldn't be surprised if the higher end chips in 2021 have a dedicated GPU inside the Pro and Mini.
On real world workloads: See the above about anecdotes about programmers and video editors. I don't know if there's any great sources here besides reading twitter and trying to avoid biased fanboys.
I'm waiting for more of the languages and tools I use to become fully supported on the M1 before I bite the bullet, but I'm finding fewer and fewer reasons to be skeptical of the performance numbers...
In result, native macos (and ios) programs need less memory. As macOS is also built on the same memory discipline, it is more memory efficient.
Having said that, the 5800U might not be too far off the M1 in raw performance even on the older process. AMD's improvements on the same node for Zen3 are pretty good!
AMD 5800U (7nm), single-core 1421, multi-core 6450
Apple M1 (5nm), single-core 1613, multi-core 6489
https://browser.geekbench.com/v5/cpu/compare/5021403?baselin...
Note that a large part of the M1 multi-core score is due to advantages in Machine Learning and AES-XTS. Without those it would be behind AMD's processor and I don't see ML or AES being relevant for most users.
Makes me wonder what will be AMD's 5nm performance.
You picked one of the odd outliers for the M1 (background activity running at the same time as the benchmark?).
e.g. I can do this on my Raspberry Pi 4 running 64-bit Raspberry Pi OS.
qemu-system-aarch64 \
-M virt,accel=kvm -cpu host -m 2G -smp 2 -nographic \
-bios /usr/share/qemu-efi-aarch64/QEMU_EFI.fd \
-cdrom alpine-virt-3.12.0-aarch64.iso