Hmm. The 6502 is/was often set up to access the memory only half the time. For example a 1MHz CPU would be interfaced with 2MHz memory, and access every other cycle.
https://en.wikipedia.org/wiki/MOS_Technology_6502#Technical_...
I guess Ben knows this, but avoided it for some reason. Perhaps interleaving the timing on a breadboard isn't that easy? Never tried it myself.