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Comment by rwmj | Hacker News Reader

That's what the RISC-V compressed instruction encoding is all about. There is a paper which I can't find right now about how the compressed encoding achieves something similar to x86 code size on typical application code. As I said above, the jury is still out until we get very high performance RISC-V implementations which are equivalent to existing high end x86 and aarch64 designs.

Edit: Here's the thesis about the design decisions in the C encoding: https://people.eecs.berkeley.edu/~krste/papers/waterman-ms.p... See also the diagram on page 62 of this document: https://people.eecs.berkeley.edu/~krste/papers/EECS-2016-1.p...

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First of all: I agree with you that the jury is out. We are all speculating. I might be wrong.

The thing I see is this: you can also add compressed encodings for any ISA. And that has its own costs (it’s harder to decode and it’s harder on software that wants to do bidirectional analysis of machine code). So “my isa has shortcomings but it’s cool because compression” isn’t a perfect argument since if your isa lacks those shortcomings then you still benefit from compression and you don’t need it as much, which is better.

Do any other ISAs have compressed encodings in wide use? It seems a bit like a chicken and egg problem - why build all the silicon to handle decoding it if your base ISA is dense enough?

Sounds pretty similar to thumb mode on ARM, no?

And ARM licensed the Hitachi SuperH patents when implementing Thumb. It's not exactly a new concept.

ARM had Thumb, right? Is that a deadend at this point?

Thumb was removed from ARMv8 (AArch64). If you use 32-but legacy, it may exist on some chips; but it’s no longer the benefit it once was.

It's always been of the same value. You exchange performance for code density. They want aarch64 to be high-performance, so they removed thumb.

RISC-V compact instructions don't require special modes and run in fully-mixed mode with 32-bit instructions without all the penalties thumb has (they are literally just extended into their 32-bit counterparts internally).

> It's always been of the same value. You exchange performance for code density.

High code density became less valuable, was the point.

Arguably x86 only has a compressed encoding in the sense that super common instructions often fit in fewer than 4 bytes and some of the most used ones are 1 byte. I don’t think the compression is deliberate or optimal though.

Arguably most of the 1 byte instructions are garbage, though ;)

What, no love for AAA :-?

(IIRC they removed that one on x86-64)

In addition to Thumb there are apparently at least MIPS16e ASE and PowerPC VLE.

> it’s harder to decode and it’s harder on software that wants to do bidirectional analysis of machine code

not necessarily, since

1. the compressed versions are basically 1-1 to the non-compressed versions

2. the uncompressed versions are more for study/academia and clarity; its expected that irl only compressed instructions are used (for instructions that can be compressed)

more info: https://riscv.org/wp-content/uploads/2015/11/riscv-compresse...

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