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Comment by dragontamer | Hacker News Reader

But this is an architectural tweak on the same node. Zen2 was 7nm TSMC, while Zen3 is 7+nm TSMC.

TSMC must have optimized the heck out of their transistors to deliver such a large benefit. Or the AMD Zen 3 architecture really found some low-hanging fruit or something to grossly improve performance.

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The IPC increase seems to be coming from the microarchitecture, not the process. The Anandtech article includes a breakdown:

https://images.anandtech.com/doci/16148/1%20Slide%206_575px....

    +2.7% Cache Prefetching
    +3.3% Execution Engine
    +1.3% Branch Predictor
    +2.7% Micro-op Cache
    +4.6% Front End
    +4.6% Load/Store

No silver bullet there, just small gains in a bunch of areas. Some of those may have been hard wins too.

> low-hanging fruit or something to grossly improve performance.

If there’s such a thing anymore I’d be fascinated to hear about it.

Anandtech will have one of their detailed microarchitecture breakdowns at product availability day (November 5th).

In the slides it was still marked as 7nm without the +.

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