> they have yearly CPU instruction limits
This sounded too ridiculous to me, so I started digging. Lo and behold, [1]. Appendix 8, sections 2 and 3.
The entire thing is a fun read, with pearls such as:
in the case of an Intel CPU with either the Sandybridge or Ivybridge
chipset where the competitor chooses not to exploit the AVX feature; the
competitor must explicitly declare and be able to demonstrate that they are
not using the AVX feature in the CFD solve process. If the non‐usage of the
AVX feature is proven to the auditor, the Intel Sandybridge and Ivybridge
chipset cores can be rated as 4 FLOP/cycle/core rather than as 8
FLOP/cycle/core.