Developers Try Again to Upstream Motorola 68000 Series Support in LLVM
phoronix.com
phoronix.com
> https://www.youtube.com/watch?v=-6zXXPRl-QI
Slides can be found here: http://m68k.info/assets/LLVM-Backend-for-M68k-Overview-and-S...
And a Bountysource campaign to support the project here:
> https://www.bountysource.com/issues/90829856-llvm-complete-t...
Disclaimer: I'm one of the people behind this project but not the main developer. So funds are going to the developer, not me.
On the other hand there is Small Device C Compiler (SDCC) project that provides a decent compiler for Z80 CPU. There is also cc65 for 6502 CPUs.
The strangest thing is that Free Pascal seems to support 68k out of the box (https://www.freepascal.org/) and also AVR and bunch of other archs.
A thought occurs to me: would it be possible to use that compiler to bootstrap your way to a modern C dialect? At one point, there were no C89 compilers. So, one would have to write a C89 compiler in K&R. Or am I failing to appreciate just how much work it would be?
You don't need to. SmallC is a cross-compiler, not a self-hosting compiler; it runs on a modern computer, not an 8085. If you wanted to modify SmallC to accept modern C syntax, you can do that without "bootstrapping" anything.
However, a much more efficient approach would be to add support for older architectures to a modern compiler. Then you can build binaries via cross-compilation, or cross-compile the compiler itself to get a modern self-compiler on an old system.
If you want to limit your retrocomputer design to only parts that are still manufactured, like I do: The only cpu choices appear to be: Z80, 68c02 and 68c816
But it's not recommended for new designs.
$19.39 for one
https://www.digikey.com/en/products/detail/nxp-usa-inc/MC68S...
https://www.nxp.com/products/processors-and-microcontrollers...
https://www.phoronix.com/scan.php?page=news_item&px=GCC-11-m...
The Julia folks had resurrected the C backend to LLVM at least once, it is also a possibility.
I work on a OS kernel (non-Linux), and in my view, we should support x86_64, arm64, and maybe ppc64le. But instead we have all sorts of 32b legacy hobbiest platforms where there are maybe 3 machines in the world running on them. These platforms make it harder to test changes, simply by the fact that it takes regression tests longer to compile & run, you have to build/install more cross tools, etc. They make it harder to develop because all of a sudden you realize that some standard interface is not implemented on them, and you have regression test failures that you need to work around.
I'm fine with hobby platforms if they play in their own sandbox, but not when they impede development of current systems.
The key fact is that, in the mid 90s, DEC Alpha was the fastest thing around, and poised to take over the world. It was expected to be the future (until it was killed by corporate incompetence and itanic). That's why I worked on FreeBSD support, and why Linus worked on Linux support. Alpha was also valuable because it was one of the first 64-bit platforms, and found a lot of pointer/int/long bugs on both systems.
There is a big difference between supporting what you expect to be the future of computing to what you know to be the long dead past.
As for bugs, I seem to remember that it had a rather different cache coherency model to Intel, and as you said, was strict about memory alignment.
If your device is powered by batteries, 3.3V will let you get longer battery life than 5V. I think I recall hearing that 3.3V can reduce power consumption by as much as 50% relative to 5V. If your device is powered by USB, which is nominally 5V, 3.3V can still be nice because USB power supplies don't always supply the cleanest power, so regulating it down to 3.3V can result in a more reliable power supply.
The reason is mostly power efficiency and the option for higher frequencies as far as I'm aware
Lower voltages also make transistors slower, though. That can be offset by making them smaller, but we couldn’t do that decades ago (https://electronics.stackexchange.com/questions/109533/why-a..., https://en.wikipedia.org/wiki/CPU_core_voltage#Power_saving_...)
I guess there also is some effect along the lines “higher voltages decrease sensitivity to noise” that prevented early designs from using lower voltages and lower currents.
As to what’s used now: 3.3V was the new 5V, but state of the art CPUs are even lower at ≈1.2V
These days, IO voltage is usually detached from core voltage, and there may actually be multiple IO voltages. Memory and PCIe often get their own carefully turned IO voltages.
For lower speed, low cost devices, 3.3v is basically standardized, though on battery powered devices you will commonly see 1.8v.
Anything hobbyist is being dragged to 3.3v. 5v devices keep getting harder and harder to find.
But there are modern NXP coldfire parts. The CPU core is mostly binary compatible with 68k, just with some legacy instructions removed.
Coldfire SOCs clock up to about 400mhz and have support for modern devices like ethernet and usb.
Ironically, a HN comment I made about this a few years ago is now one of the top Google results for "68SEC000", ranking higher than NXP's own product page.
Mouser didn't appear to have any, so I decided it must have gone out of stock in the last few years.
Though now I see digikey still have them.
Are they actually still sold by NXP, or do digikey just have one last shipment sitting in a warehouse?
68010 is IMO a bugfixed 68k, and what should have been used for any design that would otherwise target 68k, since the moment it became available.
For things like embedded systems that continued to use the 68k, they don’t need the bug fixes, and the speed boost seems minor. I guess either the market didn’t see the need to change, or Motorola didn’t price it competitively enough to be a viable choice over the basic 68k.
Sure, but that comes with 32bit bus baggage.
The 68010 uses the same packages (dip included) as the 68k, and truly is a drop-in replacement with less bugs and slightly higher speed.
My side project is to make an MMU for it with an FPGA. The board doing the logic level shifting was my first custom PCB design!
If you don't mind saying, what level shifter chips are you using? I suspect 74LVC245 is far from ideal... and that I'll need to get some PCBs made.
For the pins on the 68010 which are wire-OR (RESET#, HALT#, etc.), I have a 4.7K pullup on them, the input side of a 74LVCH245, and the output side of a 74LVC06 (inverted) or 74LVC07 (buffer), which have open drain outputs. The input side of those go to the FPGA. That way it can drive those pins or see when they're being driven by another device.
The typical propagation delay is 3 ns at room temperature, with a worst case of 7 ns. However, the whole system is operating at a 12.5 MHz. (80 ns clock period).
If it makes you feel any better, I have a few PC/104 25/33 MHz 386EX SBCs from 2001 that use 74LVC245s as bus redrivers. If they're good for a 33 MHz (66 MHz FCLK) 386, I can't imagine any issues occurring with a 12.5 MHz 68k (https://docs.embeddedarm.com/TS-3100).
A preliminary test of this whole thing was attaching an Arduino Mega (16 MHz, 5V) via the external bus interface connected with 3x 74LVC245A (DIP) (one for AD0-7, one for A8-15, one for control signals) to a Mojo v3 (Spartan 6 LX9). I basically made a bunch of ARM style peripherals for it (32 bit counters, etc.) that it could interface to. Didn't have any troubles in the ~12 hours I left it running.
Arduino: https://imgur.com/5uEVJyN 68010 Prototype: https://imgur.com/ydJ5OCU
The breadboard things are using the DIP version of the 74LVC245A, the PCB version has the 74LVCH245, which is only available in surface mount.
They do exist in the form of M683XX microcontrollers.
That's the OP's point. Merging LLVM changes is gated by CI tests for obscure and moribund platforms.
If you have then you tell them you're going to reduce your test case and also that you're going to contact the SystemZ and SPARCV8 maintainers. Maybe your branch won't make it into the tree. Maybe it's your fault or maybe it's theirs; if it's theirs they'll WANT to know about it. Maybe it won't make it into the tree for this release but it might for the next after the bug is fixed.
Development is done in parallel and the middle end always gets improved by being stretched and abused by multiple backends. There are out of tree backends which beat the hell out of GlobalISel (Apple GPU). I'm GLAD that they've done the hard work of beating GlobalISel into shape because it makes it a more stable platform for me. There are in tree backends which are models for cloning (MIPS) even though the vendor is basically an IP holding company.
LLVM stands in contrast to GCC. LLVM was architected as a collection of modular and reusable compiler and toolchain technologies. And then when people actually do that it's a good thing.
Right now LLVM 11 is in RC4, about a month late. There is surprisingly little if any sturm und drang on the developers' list about this slip. Work on LLVM 12 has commenced, in parallel.
O_o
how a branch-to-be-pulled for your backend will break SystemZ unless you've been modifying the shared middle end.
OP: They make it harder to develop because all of a sudden you realize that some standard interface is not implemented on them, and you have regression test failures that you need to work around.
I don't think the OP said anywhere that he was exclusively developing an arch backend.
If you have then you tell them you're going to reduce your test case and also that you're going to contact the SystemZ and SPARCV8 maintainers. Maybe your branch won't make it into the tree. Maybe it's your fault or maybe it's theirs; if it's theirs they'll WANT to know about it. Maybe it won't make it into the tree for this release but it might for the next after the bug is fixed.
Yes - and this all goes back to what the OP complained about - that these are moribund platforms and that keeping them running is an undue burden for devs working on living archs and extending the Clang/LLVM spine.
I'm GLAD that they've done the hard work of beating GlobalISel into shape because it makes it a more stable platform for me
...which is why the OP mentioned that it might be an unpopular opinion.
The OP is doing work for you, extending Clang/LLVM while keeping it in working order for platforms that shouldn't be supported based on deployments, "beating [it] into shape" for you. Snarky replies like "use the right compiler options, duh" seem mean-spirited.
LLVM has an "experimental platform" flag that obviates this problem. IIRC, the Linux kernel also has something similar wrt. highly experimental config options.
All of them commercial products and from companies in the US and the UK.
The problem with limited platform support is the lack of competition which helps to lower prices and provides more choice to the customer.
Especially considering the many vulnerabilities Intel CPUs have.
I'm aware that hobbyists platforms are something different, but you excluded many other commercial targets like MIPS, RISC-V, S390 as well.
Or maybe I was misunderstanding the point of Theo's post back in 2014 around the discussion of their power bill[1].
https://www.researchgate.net/profile/Paul_Carpenter6/publica...
It's become unthinkable in the open-source world to not have "one X to rule them all" (in this case X happens to be "compiler", but you see this effect with other tools).
Hobby platforms, especially long-dead ISAs like 68k, should be easy to integrate with LLVM (perhaps through a plugin system? I'm pretty sure both GCC and LLVM have that... you install `gcc` and then you install `gcc-platform-x` or something...) but requiring LLVM core maintainers to think about your obscure arch is not worth it IMO.
I suspect for many tools, the hobby platform guys are the same as the other patch guys.
> https://buildd.debian.org/status/package.php?p=neovim&suite=...
:-)
https://lists.llvm.org/pipermail/llvm-dev/2020-September/145...
Normally Phoronix is more or less blogspam, but in this case Larabel has actually added some interesting context (history of the backend in LLVM and GCC). So I do not suggest changing the discussion's URL to the ML post.
As a preservationist, I can confirm this would be used. Not much, but it would be used.
So 68k really is comparable to (32-bit) x86.
Edit: Z80 is 8-bit, not 16-bit.
you can still download and compile dcc (http://legacy.obviously.com/dice/ and https://github.com/noname22/NeoDICE) but having first class support in llvm would be very nice.
Other than dice, there's vbcc[1].
TFA clearly states gcc support was rescued by hobbyists in the community, it's not being dropped.
It's a closed -buggy- FPGA reimplementation of something like 68k (nobody outside them knows exactly what, there are rumors it's based on a ColdFire core that was leaked by mistake) with some custom extensions that are underdocumented and have nothing to do with classic Amiga systems.
The entire platform is meant to lock you into their proprietary FPGA core and is totally counter the spirit of the Amiga which was the ultimate hacker's machine.