Hacker News Reader

Comment by ncmncm | Hacker News Reader

The thing I find frustrating about FPGAs is how they are stuck in the "ASIC-replacement" mind-set.

In principle, these things could change their programming on the fly, as fast as everything happening in the regular logic, but everybody thinks they have to be programmed at power-up and left that way.

If the programming bit-stream could be fed, separately, to each section of the die, under control of logic on other parts of the die, a system of totally adaptable logic would become possible. Different programming could be installed according to the needs of the moment, replaced with other logic the moment needs change.

It would be a project to figure out out to usefully program such a system, but we are up to it. Our phones adopt completely different usage each time we tap on an app icon, but the performance of apps running on CPUs is strictly limited.

View on HN

Active partial reconfiguration is a thing and works pretty much as you say - some parts of the chip continue running while others are swapped out, and an example use case is video encoding, just swap in the encoder engine optimised to a given standard, rather than have every standard in the same design requiring a much larger device.

Thank you. Which devices support active partial configuration? I have not encountered any mention of it, before. The "Three Ages of FPGAs" paper in IEEE has "reconfiguration" in the title of a single reference, and no mention in the text.

It's recently been renamed dynamic function exchange (marketing I guess?) but it'd supported in xilinx 7 series and later: https://www.xilinx.com/products/design-tools/vivado/implemen...

Thank you.

The DFX apparatus all looks distressingly proprietary, not to say clumsy. It seems like it will be a long time before this capability leaks out to mainstream use.

After it becomes more accessible, one could hope to compile programmatically generated logic on the fly, and immediately configure some chip area to execute it, perhaps with on-demand / JIT swapping between software and hardware implementation. O Brave New World!

Even for moderately complex designs the synthesis times are way too long for that to be feasible. Unfortunately, a lot of it is inherent to the problems/algorithms involved. So getting rid of the clumsiness of proprietary synthesis tools won't be sufficient, you are going to need another breakthrough.

It is always easy to invent ways for ambitions to be impractical. But, surprise, those are not the things people actually do with new capabilities. Instead they do clever, sensible things that work for them.

Reply on news.ycombinator.com