Cheaper $ cost per TFLOPs to make up for the trouble of dealing with a specialty instruction set? Speed of certain specialized computations that cannot be matched by alternatives?
Or how would one summarize it?
And yes, when used ‘correctly’, these systems can be very fast... in the steady marathon kind of way rather than the spasmodic sprint-racer clock-boosting-and-throttling manner of today’s mainline chips.
How do you reconcile this comment with the one from reacharavindh?
What use is the "Open Architecture" part if they're super expensive (ok, maybe you can ignore this part) and you have to go through sales representatives for a simple sale?
Those are still barriers to entry, even if they're not technical.
1. Is any of these "Open" architectures actually used in production anywhere serious when not implemented by their creators? I'm actually interested to know of examples.
2. How do we know that the actual chip IBM provides is the thing in the spec? The comparison was with Intel, how can we prove that there are no backdoors for PowerPC? If we can't prove, does it matter if it's "Open"?
I never claimed it was, and this is starting to reek of a straw-man argument where you’re opposing a statement I haven’t actually made.
(1) Yes, I am aware of situations where this architecture has been chosen by a body that isn’t a chief implementor, and no, I am not at liberty to discuss it.
(2) Having an open spec to compare against, even though I actually don’t know how, is already another plane of existence compared to not having something to compare against.
Decapping and microscopy? Pushing edge cases onto the chip and comparing expected outputs? Implementing all or part on an FPGA and seeing how they compare at a severely clock-reduced rate? It’s well beyond my technical ability, but it’s not beyond expert technicians’ abilities. That’s the key point.
EDIT: Also you can set your own keys for the root trust, and remove others’. That’s very important, and radically orthogonal to the competition of ARM and x86₆₄.
> ‘Open’ means that you’re allowed to understand exactly how it works and that there’s no mysteries. It means having the blueprints of the machine, not a free machine.
No, this is 100% incorrect.
The Power ISA, i.e., the software/hardware interface of the CPU, is open source. This means that if you want to build a Power CPU that implements its software interface, you can do so "for free".
That's it. You don't get "the blueprints of the machine", you cannot look into how the CPU work internally and understand it, etc.
That's like having a standard API that anybody can implement, e.g., the C standard library, but which Apple, Microsoft, etc. ship as a black box binary blob, so you can't understand their implementation, search/fix bugs, etc.
So no, your claim is completely incorrect. The benefits of an open ISA only apply to those wanting to build their own CPUs, which for Power is just not even a handful of companies, none of them making their blueprints of their CPUs openly available...
For end users, your machine is as open/closed on a system with an open ISA like in one with a closed one. People paying 10k$ for a Raptor II in the name of openness are throwing their money away.
This is a completely different situation than, e.g., RISC-V, where not only the ISA is open-source, but the VHDL implementation of many RISC-V cores is also open source, and you can buy those cores today.
Which is pretty much how it works in the Summit supercomputer (POWER9).
--------
From a CPU-perspective, its going to be more costly than a Xeon or EPYC and not as fast at crunching numbers. But POWER9 (and I expect POWER10) usually had the best L3 cache and RAM performance.
The 1TB/sec OpenCAPI link to FPGAs or GPUs continues that tradition. That's an absurdly huge communication path between CPUs and/or GPUs or whatever else is on the motherboard.
If your organization has an existing relationship with IBM or Red Hat, Power CPUs are part of an integrated bundle moving forward.