Didn't IBM have an ALU design that were more harden again calculation errors?
Didn't IBM have an ALU design that were more harden again calculation errors?
Setun used balanced ternary logic instead of binary logic. Each trit could be -1, 0, or +1. For numeric values, there was no need to store a sign, since the sign of a number would be inherent in its ternary value.
Then the Soviets decided that it would be easier and faster to just copy western computers, and the concept wasn't developed any further.
To the best of my knowledge, BESM-6 and Elbrus were not clones
I'm genuinely confused what is meant by this in practice. Like some sort of redundant ALU architecture or rad hard encapsulation?
this might be what is referenced?
I did work as a CPU logic desiger at Amdahl. We had full parity through-checking, so an ALU intermittent logic error would raise a parity exception. Certainly IBM would have had the same, it was standard SOTA reliability logic for the era of mainframes when I was a designer.