What sort of things are you talking about here, out of interest? The only way you're going to wreck hardware is if you're attaching something completely incompatible at the physical level (wrong levels, shorts, etc.); if you're "tinkering" you almost certainly don't have the resources to bring up your own PCIe PHY (there's pretty much no way to do this without custom silicon) so presumably you have some preexisting hardware in mind?
If you just want to play around at the TLP level (for example by using the hard PCIe core in a cheap Xilinx Series-7 chip) then this is all pretty safe: (temporary) catastrophic system instability is one thing (I learned this the hard way when I accidentally had my FPGA spamming MSIs every free cycle), but real hardware damage is pretty tricky.
> seems pretty minimal
Is there actually any at all? I can't really see how this could lead to any damage.