I think you are confused of what RISC-V is and how these things work.

RISK-V is just ISA.

You will have open source RISK-V microarchitectures for processes that are few generations old. You can use the same design long time when the performance is not so important.

You will not get open source optimized high performance microarchitectures for the latest process and large volumes. These cost $100s of millions to design and the work is repeated every few years for a new process. Every design is closely optimized for the latest fab technology. They have patents.

Intel, AMD, Nvidia, ARM, all have to design new microarchitectures every few years. It's not just doing some VHDL design. It involves research, pathfinding, large scale design, simulation, verification and working closely with fab business. The software alone costs millions and part of it is redesigned. Timelines are tight or the design becomes outdated over time.