Apple Silicon implements tricky x86 behaviors in hardware for faster emulation

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32 points·jsheard··9 comments

Shouldn't ARMv8 LDAR (Load Acquire) and STL (Store Release) instructions be enough to emulate x86 memory model? What did I miss?

Or would that entail more overhead compared to just having TSO memory model?

Too slow, probably. Either they'd need to do advanced dataflow analysis to not have them everywhere (slow/complicated) or just insert them everywhere (slow).

I don't see how any kind of dataflow analysis could capture for example accessing thread stack from another thread. Just too many ways to get the pointer.

And with Apple it doesn't even have to be additional CPU instructions since Apple controls whole SoC. If your upcoming code uses any Apple specific stuff (e.g. DSP, security chip, NN) with Apple only API then it basically becomes "very hard" to port. So goodbye for Hackintosh.

I knew it, “apple silicon” branding allows them to de-normalize ARM at will.

The "only" ARM aspect of Apple Silicon is the instruction set.

Nothing to do with "de-normalizing".

How so?

TSO is a valid implementation of the ARM memory consistency model.

Which licensee uses ARM branding?

You can use examples from any product in any market segment.

The Acorn RISC PC doesn’t count because they don’t make that anymore. It has to be a product on the market today.

I thought the entire point of ARM is that you license the ISA, add in your own special sauce to make your own thing and then sell it as your own thing.

There are ARM architecture systems in the machine room at work. They’re ThunderX2 not “ARM”.

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