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Comment by rwmj | Hacker News Reader

> Intel, AMD, and many other companies use FPGAs to emulate their chips before manufacturing them.

Really? I'm assuming if this is true it can only be for tiny parts of the design, or they have some gigantic wafer-scale FPGA that they're not telling anyone about :-) Anyway I thought they mainly used software emulation to verify their designs.

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Having been involved with CPU emulation in the past a couple of comments:

1. It's not just a single FPGA but a large box full of them. for example: https://www.synopsys.com/verification/emulation/zebu-server....

2. Software models are employed for parts of the system (For example, the southbridge and all the peripherals connected to it are generally a software model which communicates with the hardware emulated portion in the FPGA via a PCIe model which is partly in hardware and partly in software.) This saves a lot of gates in the FPGA - those parts have already been well tested anyway so no need to put them into the hardware emulation.

Of the half-dozen semiconductor- designing companies I've worked for, all of them used FPGAs for emulation.

- modern FPGAs are huge.

- when an asic design won't fit in a single FPGA, it's usually possible to partition the design into multiple FPGAs

- software emulation/ simulation is not guaranteed to be "more accurate". FPGAs can interact with a real-world environment in ways that simulation simply cannot

- simulations run 1000s of times slower than FPGAs. Months of simulation time can be covered in minutes on the FPGA

Edit: to be clear, they all use simulation too, but FPGAs are used to accelerate the verification process

Is that still true in 2020? Or is the simulation getting good enough to skip the FPGA prototyping phase?

Its still very much true. ASIC designs are described as massively parallel tiny communicating sequential processes. FPGA's are also extremely fine-grained CSP, to a degree that is much finer than anything a CPU can produce today.

Many years ago, we had a custom made board with 8 huge Xilinx Virtex 5 FPGAs (the largest available at the time) to emulate a large SOC. Those FPGAs were something like $20K a piece.

We had 10 such boards, good for millions of dollars in hardware, and a small team to keep it running.

These platform were mostly used by the firmware team to develop everything before real silicon came back. It could run the full design at ~1 to 10MHz vs +500MHz on silicon or 10kHz in simulation.

After running for a while, that FPGA platform crashed on a case where a FIFO in a memory controller overflowed.

Our VP of engineering said that finding this one bug was sufficient to justify the whole FPGA emulation investment.

The multiple FPGA on a board is generally from Dini Group right? Fantastic boards.

Ref: https://www.dinigroup.com/web/index.php

There are a lot of companies who create multi-FPGA boards. The market for FPGAs-for-ASIC-prototyping is substantial.

No, it was in-house custom made for the purpose.

Huge PCBs, ~2ft by 2ft.

Curious, what was the reason for going with custom board instead of COTS boards?

Is board to board connection with high speed connectors feasible? This was what I heard from verification folks.

Dini's naming schemes are hilarious. They're all named like monsters in B-movies -- their latest system, the DNVUF4A, is called "Godzilla's Butcher on Steroids", for instance.

Also, Dini got acquired by Synopsys a few years ago.

Oh I love their humor. There is always something humorous written for their status LEDS.

"Although no specific testing was performed, sophisticated statistical finite element models and back of the envelope calculations are showing the number of status LEDs to be bright enough to execute dermatological procedures normally done with CO2 lasers. Contact the factory for more information about this sophisticated feature and make sure an adult is present during operation. These LEDs are user controllable from the FPGAs so can be used as visual feedback in addition to burning skin."

"As with all of our FPGA-based products boards, the DNVUPF4A is loaded with LEDs. The LEDs are stuffed in several different colors (red, green, blue, orange et al.). There are enough LEDs here to melt cheese. Please don't melt cheese without adult supervision. These LEDs are user controllable from the FPGAs so can be used as visual feedback in addition to the gratifying task of creating gooey messes."

Design verification is big business and your VP was exactly right, a factor of 100 to 1000 speed increase would allow for much more thorough testing and broader testing as well, for instance hooked up to other hardware with reasonable fidelity compared to the real thing. Still coarse but a lot better than nothing. Good call. It isn't rare at all to have a respin if you don't do design verification.

One of the nicer stories about the first ARM chip is that they built a software simulator to verify the design and as a result they found plenty of bugs in the hardware before committing to silicon. The first delivered chips worked right away.

The largest FPGAs were reticle-busters when I used to work on them. Today I think the largest FPGAs use chiplet-style integration. Even with the inefficiency of an FPGA, many smaller chip designs can still fit on the largest FPGA.

Also, there are prototyping boards specifically built for emulation that integrate multiple FPGAs, although this does introduces a partitioning problem that has to be solved either manually or via dedicated emulator software.

The FPGA emulator for a chip I was working on involved an entire rack of FPGAs... for a single core.

https://www.youtube.com/watch?v=650yVg9smfI

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