First, Intel and the semiconductor consortium started the garbage definition of a technology node about 10 years ago, when pitch levels stopped following Moore's law.
Now TSMC and all Intel competitors straight up started lying through their teeth. I'm sure what TSMC is calling '5nm' is a complete joke even in face of the horrible redefinition 10 years ago.
Don't believe me? See for yourself:
- nVidia GeForce GTX 1080 Ti was announced in 2016. base clock 1481 MHz, 11.34 TeraFLOPs FP32, on a 471 mm2 die [1].
- Four years later, RTX 3080 Ti, base clock 1905 MHz, 21.1 TeraFLOPs FP32, on a 700 mm2 die [2].
- 21.1 / 11.34 = 1.86x improvement in raw TeraFLOPs.
- 700 / 471 = 1.486x die size increase
- 1905 / 1481 = 1.286x base clock increase
- 1.486 * 1.286 = 1.91x
Conclusion: nVidia could use the bigger die size and the higher base clock to deliver 1.91x the performance using the same 16nm technology node (theoretically). But instead, using the 7nm node, they're delivering even less of a performance bump, 1.86x, when in reality it should've been 7.64x (= 4x * 1.91x, considering two node jumps, and the die-size and base-clock bump).
[1] https://www.techpowerup.com/gpu-specs/geforce-gtx-1080-ti.c2...
[2] https://www.techpowerup.com/gpu-specs/geforce-rtx-3080-ti.c3...