To be fair, most of that is them catching up to where Intel already was. Noone seems to actually be fabbing meaningfully smaller feature sizes (or higher layer counts) than what Intel is stagnating at.
Eh, Intel's 14nm is 37M transistors/mm2. TSMC and SS are both up to 52M/mm2 at 10nm, and 92M/mm2 at 7nm. Both Apple and AMD's latest gen stuff is on TSMC's 7nm process _today_. Yes, Intel's 10nm is at 101M/mm2, but until they can get mass production on that they're falling substantially behind.
(I stand by "most", but it's nice to hear that someone's making actual progress again.)
Intel and AMD might be able to deliver somewhat higher performance by throwing a whole bunch of cores at the problem, but they do so at a much higher cost in power requirements. And it would be easy enough to design ARM machines with an equal number of cores (or even way more), and still have much lower power requirements.
Intel stagnated, and has high power requirements. ARM has caught up, and has much lower power requirements.
The reasoning seems pretty simple to me.
Also Intel and AMD have not delivered higher performance via more cores; they delivered lower price for (say) 64 cores worth of performance, by putting them all on the same chunk of silicon (edit: or at least in the same package). (There are some slight improvements in inter-processor interrupt and cache-forwarding latency, but if that's a performance bottleneck, the problem is bad parallelization at the code level.)
Arguably AMD did the exact opposite - lower prices via splitting a processor into multiple pieces of silicon. (Chip price scale exponentially with area at the high end)
Sure, but that's them having a competent
(well, less incompetent) ISA and microarchitecture
Have you looked at the encoding of Thumb-2 (T32) and particularly A64 (their newly designed instruction set for 64 bit)? Their instruction encoding is in my opinion much more convoluted than x86.
ARM hasn't. Apple has. Apple's implementation of the ISA since A6 is unrelated to ARM's.