Russia’s Elbrus 8CB Microarchitecture: 8-Core VLIW on TSMC 28nm | Hacker News Reader

Russia’s Elbrus 8CB Microarchitecture: 8-Core VLIW on TSMC 28nm

anandtech.com

150 pointszdw70 comments

This is less known fact, but few years (15+) ago Intel hire Elbrus design team: https://www.extremetech.com/extreme/56406-intel-hires-elbrus...

"On Monday, Intel representatives confirmed reports in Russian-language newspapers that the American chip giant had hired approximately 500 engineers and related staff from the Elbrus Moscow Center of Sparc Technology, a state-sponsored design house in Russia. Some of the engineers will be hired away from Unipro, a related company. The new hires include Boris Babayan, Alexander Kim and Ivan Bolozov, said to be the architects of the E2K processor, a failed “Itanium-killer”."

And same happens in past too: https://www.theregister.com/Print/1999/06/07/intel_uses_russ...

But i couldn't get information more about this team.

Do you think this was just to try and make it harder for them to compete by stealing their workforce?

If it's not then it seems an excessive amount of engineers at one time even for Intel. The goal would seem to be to cull the whole team.

Well here is one video: https://www.youtube.com/watch?v=PUNJ_tkq2hk

It's on Russian, but shows how underpowered CPU (on paper!) can play with no lags resource hungry game.

So let's back on Intel's issues. Almost 20+ years ago Intel have a huge project that failed. Itanium based on VLIW architecture. Then Intel start pushing P4 architecture (Netburst) to the maximum. I think that they're hit 3GHz barrier and there isn't path beyond that.

And then PentiumM was born (from Israeli team) and soon CD, C2D.

"Russian designer could have been inspiration for Pentium name " - it's actually a fake news, Pentkovsky joined Intel several years after start of Pentium R&D.

I've heard that Pentium was named Pentium really late into it's dev cycle once the trademark office told Intel that trademarking model numbers wasn't going to be kosher.

I thought Intel had a contest for naming the 486 successor.

And i thought pentium was basically 'penta'=5 ... 486 + 1 arch bump.

At most companies they choose the marketing name near final release not at the start of R&D.

Pentkovsky joined Intel when they were developing Pentium III.

8086 -> 286 -> 386 -> 486 -> (5)86

Where (5) is Pente https://en.wiktionary.org/wiki/%CF%80%CE%AD%CE%BD%CF%84%CE%B...

I find this wide addressing mode interesting

> -m128

> compile in 128-bit secure addressing mode with hardware access control to objects.

> In this mode, a pointer to data and functions takes 128 bits. It contains the 64-bit address of the object, its size (no more than 4 GB) and the position of the pointer inside the object. The mode enhances program memory control during execution.

Like Intels unused bound checking additions, it checks the starting offset and the ending offset. But without the HW hash table.

There was a video on YouTube (in russian) where lead developer from MCST confess that they were unable to use this technology in practice. The entire software stack should be ported to strictly eliminate any usage of pointer magic in every place. They poured years on this and only succeed on porting libc and few small base libraries.

There seems to be very little technical details available on the E2K processor's instruction set. Although Linux has been ported to run native on it, the E2K Linux distribution and sources don't appear to be publicly available.

Some people suggest this is security-through-obscurity connected with E2K's use in Russian military systems. I wonder if that is true.

The other issue, from what I understand, is the only C compiler for E2K is proprietary [1] (it is using EDG frontend). There is no support for E2K in GCC or LLVM. This also means their port of Linux couldn't be upstreamed since it can't be compiled with GCC.

[1] https://lvee.org/en/abstracts/303

There's an article in Russian about porting V8 and Firefox's SpiderMonkey onto these processors: https://habr.com/ru/company/jugru/blog/419155/

You may gleam some architectural details from the article and the comments.

That was well worth the read. Looks like the pipeline isn't exposed, which is what I'd expect for a VLIW in this role. They've got a some support for speculative loads but it seems pretty small so I'm not surprised they're having trouble adapting to general purpose code.

I'm not sure I understand what you mean by the pipeline being exposed. No processor I'm aware of other than the i860 exposed its pipeline, so I don't know what you mean by that here. Can you elaborate?

Lets say that a load from the L1 data cache takes two cycles. Take the following instruction sequence.

  r1 = 3
  r1 = load(r2) // will return 8
  r3 = r1 + 2

In a typical processor the system will stall or reorder things so that the load completes before the third instruction so the final result in r3 is 10. In an exposed pipeline model the assignment to r3 will happen before the load instruction returns so the final value of r3 will be 5. I don't think this is very common outside VLIW systems but you have some famous ones that have used it there, like the Transmeta Crusoe. And the Mill guys are hoping to use it, basically, though they're calling it phasing and it's not exactly the same thing.

http://ftp.altlinux.org/pub/people/mike/elbrus/docs/elbrus_p...

Some benchmarks (posted in the AnandTech comments).

https://raw.githubusercontent.com/EntityFX/anybench/master/d...

https://github.com/EntityFX/anybench/tree/master/results

Wow, quite pathetic results.

The floating point results are suspiciously good compared to the rest of the results. I wonder if they have some good VLIW instructions for floating point or it’s just an error in the spreadsheet.

Linpack is a floating-point benchmark focused on linear algebra operations. Coremark has some floating-point-heavy benchmarks in its suite, although a common criticism is that the footprint is too small to exercise the memory system.

So yeah, the "Maximum MFLOPS" row looks suspicious.

VLIWs tend to do well for programs with predictable-at-compile-time memory access patterns which tends to correlate with floating point heavy code.

The 28nm lithography half-node is almost ten years behind the state-of-the-art.

Apple, Intel, AMD all have commercially available products based on 7nm now.

> The 28nm lithography half-node is almost ten years behind the state-of-the-art.

Is that bad thing? I mean, computers from 10 years ago still kick ass today.

For HPC it is a huge handicap, though. Intel's 10nm process offers about 10 to 12 times higher transistor density than their 32nm process, for example. So, if you want to be fair, you should take this into account when comparing chips.

Just from a "proliferation and evaluation of technology" point of view, I find it nice that VLIW is getting a bit of a refresh (as an application processor, as opposed to GPUs or DSPs.) It's been quite some time since the Itanic sunk, and compilers have evolved... even if it doesn't go far, this is a nice opportunity to evaluate how well this can do in 2020.

We had NVidia keeping Transmeta's lineage alive in their automotive SOCs until quite recently, but now they've switched over to Arm's latest it seems. Too bad, the combination of code-morphing and an exposed pipeline VLIW design seemed like it could have been a good one though scheduling around variable delay memory accesses remains a challenge.

For those of you in Moscow, if you go to the Yandex Museum you can play with an Elbrus box. It's really neat! Pretty fast, and has an entire Linux environment running on it.

Another benchmark comparison: https://translate.google.com/translate?sl=auto&tl=en&u=https...

I'm surprised they aren't just going with ARM designed chips and moving to a Linux system. This would seem to give them scale, pricing, availability/compatibility and also if they support open source with financial contributions then a really strong level of application security out if the box.

State security is important, but corporate security is critical as a first line of defense, because without those big successful companies and their contributions in taxes, R&D and tech support the state loses flexibility and top talent. Then a state will lose ground in preservation of their independence.

https://en.wikipedia.org/wiki/Baikal_CPU

Elbrus is a more interesting architecture and presents many benefits over existing architectures; allowing it to be lost would be bad for both technical and political reasons.

I don't know about political aspect, but I don't think Elbrus is interesting technically. Frankly it's just another dead-end VLIW architecture. VLIW just isn't interesting or even relevant for general purpose computing or even high performance computing. DSP market is the only niche where VLIW has found meaningful usage, and even there, the advantage is not huge by any means.

It's not "just" another VLIW architecture, and hearing that take almost assures me that you haven't looked into Elbrus.

I have worked with MCST people (though at this point it's very long time ago). My view on Elbrus is that it's kept alive by politics, rather than technical merits.

The core challenge of the modern high-performance computing is the memory / cache latency - i.e. whichever architecture that can generate the most number of outstanding cache misses at all levels of cache hierarchy as quickly as possible will perform the best.

Between superscalar and SIMT (and lots of SIMD), VLIW has no design space left for high performance computing, as superscalar and SIMT are simply more flexible (superscalar is better for a single thread performance, and SIMT for highly parallel streaming workload). SIMD also didn't help, since it's available for both SIMT and superscalar - negating parts of the VLIW advantage.

Case in point: GPU is one area where the workload is better suited for VLIW. Yet, AMD moved away from VLIW as their new architectures are not VLIW. nVidia has been SIMT for a long time.

The niche VLIW still has some values is in DSP, where the overhead of extra die space for superscalar becomes significant, and the workload is predictable.

It's great to see that countires are starting to become more and more technologically independent.

Losing dependency on Silicon Valley may be another step after becoming hardware independent, or even those efforts can run parallelly.

I think I'd want to see tech hubs like London or Hong Kong to have significant part of "giant corps" market

You can't be independent when your only realistic fab is TSMC.

There are some fabs here in Europe, all of them are WAY behind TSMC, be it Infineon, STM or even Globalfoundries, if they are still running.

Designing hardware is nice, manufacturing it is the real problem.

That's what sanctions are for.

It is always more convenient to use existing capacity at existing vendor (A), than develop a new capacity (B). This has also the effect, that the vendor A gets a bigger part of the pie and there's no money left for the development of the capacity for B.

So once you get the Huawei treatment, you have no choice and do B.

It doesn't matter how many sanctions you pile on top of each other, if you don't have a proper fab there ins't much you can do about it but plan for 15 or 20 years, shower a shitload of money on it and maybe you have something technologically capable, but you won't have a market like TSMC so good luck making it economically viable.

In most countries your average consumer can't buy a subpar CPU for 400$.

The point is, that if you do shower money on TSMC for the next 15 or 20 years, you won't get your own fab built. You give money to someone else to get short-term advantage, at the price of not having long-term capacity & control yourself. You basically co-finance R&D that in the end will get owned by someone else.

No, your new fab won't have the market like TSMC today; but so won't TSMC tomorrow, when the market splits.

The same thing was Intel vs. rest of the fabs; TSMC made it. Just like Intel couldn't keep themselves on the top forever, the same will happen to TSMC.

Geopolitically, it'd make more sense to unify TSMC-alternative efforts and share R&D.

But countries with... expansive views on autonomy... tend to be poor bedfellows in a partnership.

Say what you want about free market capitalism, but it's an effective way of tying multiple countries together.

I’m fairly convinced that the authoritarian regimes will eventually come to realise that pooling their resources to jointly develop manufacturing technology will behoove them as it will allow them to build their own fabs to manufacture their own devices.

The know-how that will come from this collaboration is useful to all of the participants, and it puts them in a position to be independent of the USA and each-other (if each builds their own fab), and doesn’t require revealing their processor IP.

There’s other examples of collaboration between authoritarian regimes. Most of the time (in the 1970s and 1980s in particular) OPEC was hugely effective (just think of the oil crises of the 1970s when they curtailed production) despite the regimes not always being particularly open to collaboration. And realise that collaboration in a cartel such as OPEC provides each member with an incentive to defect and sell more of its own oil at the higher price. A consortium of regimes banding together to develop chip-manufacturing technology would not suffer from such an incentive (after all, they can sell it or divulge it, but that doesn’t reduce it’s value at all — and it’s zero marginal cost anyway).

Meanwhile in Zelenograd, seat of the russian Mikron Group https://en.wikipedia.org/wiki/Mikron_Group and http://www.angstrem.ru/ru/english in the https://en.wikipedia.org/wiki/National_Research_University_o...

the following happened a few years ago:

http://www.nanoindustry.su/journal/article/en/6133

https://eng.miet.ru/news/91920

https://www.youtube.com/watch?v=0DIHXh7RlhA

edit: while the "west" seems to ignore the potential for disruption (of the megafabs) mostly, it seems.

2nd edit: From a cyberwar point of view i couldn't help to burst out in laughter when i saw the coat of arms of Zelenograd, like shown here https://en.wikipedia.org/wiki/Zelenograd#/media/File:Zelenog...

Remember squirrels are one of the main sources of destroyed lines :-)

TSMC - Taiwan Semiconductor Manufacturing Company?

Yes. Aka, one of effectively three leading-edge fabs: TSMC / Samsung / Intel.

Thanks - I don't know much about hardware, so this helps.

Don't all the leading-edge fabs buy their equipment from ASML (https://en.wikipedia.org/wiki/ASML_Holding)?

All three--TSMC, Samsung, and Intel--were major shareholders of ASML in 2012. See https://www.barrons.com/articles/intel-follows-samsung-slash... Though, it seems they've mostly since divested. See https://www.eetimes.com/intel-again-cuts-stake-in-asml/

The biggest Fab factory company in the world is Dutch [0]. TSMC, Intel and friends are customers of theirs and use _their_ equipment and IP.

So the Intellectual property seems to be there? It's just that we don't have any actual factories in EU.

TSMC seems wholly dependent on Europe here.

[0] - https://en.wikipedia.org/wiki/ASML_Holding

Wow, but does that mean that TSMCs 7nm technology is really ASMLs 7nm technology, or how does that work?

No, developing a semiconductor manufacturing process requires far more than the equipment.

I don’t know how to make a semiconductor, but does that mean that Intel couldn’t make a 7nm even if you gave them access to TSMCs fab, because they don’t know how to design a 7nm chip?

Assuming no knowledge of the process, Yup!

Although it's maybe complicated by the fact that Intel has active development on 7nm, so they might be able to pick up hints from an existing 7nm line.

There are a large number of companies that make the equipment for the fabs. For example, Applied Materials and LAM Research in the Bay Area also make a a wide variety of machines. ASML makes mainly the lithography equipment which turns out to be quite expensive. Its like each vendor provides some of the equipment in the kitchen and TSMC is the chef.

https://en.wikipedia.org/wiki/Semiconductor_equipment_sales_...

This isn't new; this architecture goes back decades, and they've had hardware for ages. It's really cool, but it's not like it's just starting out.

Could you please stop creating accounts for every few comments you post? We ban accounts that do that. This is in the site guidelines: https://news.ycombinator.com/newsguidelines.html.

You needn't use your real name of course, but for HN to be a community, users need some identity for others to relate to. Otherwise we may as well have no usernames and no community, and that would be a different kind of forum. https://hn.algolia.com/?sort=byDate&dateRange=all&type=comme...

> It's great to see that countires are starting to become more and more technologically independent.

I'm of two minds. On the one hand, I like seeing a diversity of technologies. On the other hand, economic interdependence is one of the forces that prevents countries going to war.

So x86/64 support via BT, cool. But I couldn't readily find any (English language) docs describing the native instruction set, have you folks seen any?

https://en.wikipedia.org/wiki/Elbrus_2000

edit: jump from english to russki, scanning links, finding

https://www.realworldtech.com/elbrus/ (7 pages from 20 years ago, titled From Russia, With Skepticism )

This doesn’t have any info about the instruction set.

Try https://translate.yandex.com/translate?url=http%3A%2F%2Fftp....

Furthermore, some directories upwards on that ftp:

http://ftp.altlinux.org/pub/people/mike/elbrus/docs/README.t...

Detailed description of instruction set is secret. You can't even download sources for the patched Linux kernel without signing strict NDA.

Instruction set documentation was released a few days ago: http://elbrus.ru/efficient_elbrus_programming_book_2020-05

In fact you can't use this manual to create compiler for Elbrus. It looks like you still have to be russian citizen with signed NDA to get all required documentation.

The google translation is not bad:

https://translate.googleusercontent.com/translate_c?depth=1&...

Indeed, thanks!

>"All of the world’s major superpowers have a vested interest in building their own custom silicon processors. The vital ingredient to this allows the superpower to wean itself off of US-based processors, guarantee there are no supplemental backdoors, and if needed add their own."

Any major company that deals in anything Internet, Web or Cloud related -- also has a "vested interest in building their own custom silicon processors", for exactly this reason -- security.

Some have realized this (Apple, Google, etc.), and have the resources to do this.

Others have realized this and do not have the resources to do this (smaller companies).

Still others have not realized this yet (thinking that software virus protection will solve problems which are in hardware), and are still in the process of waking up.

Prediction: We're going to see a lot of new CPUs and CPU designs by many players in the next 20 years...

No surprise that it's got a large L1 instruction cache given that it's a VLIW. Those aren't known for small code sizes, though I wonder why we don't tend to see variable length VLIW architectures?

Where can I get one of these? Sick of involuntarily being included in the Talpiot Program.

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