Looking inside a vintage Soviet TTL logic integrated circuit | Hacker News Reader

Looking inside a vintage Soviet TTL logic integrated circuit

righto.com

155 pointssohkamyung18 comments

I love posts like these. For more of this stuff I recommend checking out ZeptoBars.

Lots of die shots and I’m always blown away by the beauty of some chips when designers fully know it is unlikely their art will see the light of day.

There's also https://www.richis-lab.de/index.htm

He goes into a bit more detail and explanations, and has some interesting comparisons between different versions of chips (especially fake vs original). In German, but Google Translate does a good enough job.

One of my favorites is of the LTZ1000[1] ultra-stable voltage reference. An interesting (IMHO) read about the LTZ1000 can be found here[2].

[1]: https://www.richis-lab.de/REF03.htm

[2]: https://www.electronicdesign.com/technologies/analog/article...

Back in college, when I was studying Very Large Scale Integration (VLSI), I was working on an 8-bit adder. There definitely interesting art to it. It just looked beautiful. We were doing layouts by hand (on the computer, I mean we weren't relying upon an automated layout). I don't know how many iterations I went through trying to minimize latency and area. I remember it being at least a dozen. We had a sort of informal competition (mostly for bragging rights) for the least latency and area. IIRC, I think we were using Cadence to hand-draw the layouts. Lab time was definitely at a premium.

Very cool. Second die down is a pretty neat UWB transceiver that is build for real-time location services using multiple strategies (TDoA, ToF, etc). Looks like a little of that rf black magic on the right.

The blue highlighted circular structures I believe are rf inductors.

Also check out electronupdate on YouTube. He does lots of decapping of ICs just for the die shots. https://www.youtube.com/user/electronupdate

Old Russian joke: "Soviet microchips are largest microchips in the world!"

"This year a semiconductor factory, next year a whole-conductor factory!"

-Are part-time band leaders semi-conductors?

The joke is more to the point than one may expect: https://en.wikipedia.org/wiki/Valence_and_conduction_bands

As for foot note 3: I suspect that reasoning for mostly not using TTL inverter chips in eastern designs was limiting number of BOM entries and number of chip designs that have to be manufactured in large volumes. Another thing is that in many designs the author just used random NPN transistor (selected on the basis of availability, so seeing RF power transistors used for almost anything was not that uncommon) and resistor.

Edit: and to me, 134ЛА8 with it's connected inputs seems to be explicitly designed to be usable as either bus driver or invertor replacement. You would not want to use that in hand-optimized random combinatorial logic.

Edit2: on the other hand I would not be too surprised if there was IBM SLT module that implements half of or even whole 134ЛА8 :)

The Smithsonian has a microchip collection! I had the good fortune to see the physical exhibit when it was at the Museum of American History.

http://smithsonianchips.si.edu/

I had a general question that came to mind when looking at the "How a TTL NAND gate works" section and the accompanying schematic. Are the INs and OUT lines in chips like MOSFETs implemented via the metal layers of the integrated circuits?

I'm not sure exactly what you're asking. The chip's inputs and outputs are wired from the chip's pins to metal pads on the die. These signals then routed (mostly) through various metal layers to the transistors. For a MOSFET, the source and drain are in the silicon, while the gate is a polysilicon layer over top. The source, gate, and drain usually have contacts connecting them to the metal layer.

I wrote a post explaining how some of the MOSFETs in the Z-80 microprocessor are wired up. It might help you: http://www.righto.com/2013/09/understanding-z-80-processor-o...

Wow, this post is really amazing!Thanks! I had a couple of question about the following:

>"If input A is high, the first transistor will conduct and connect the yellow strip to ground (dotted line 1)"

How does A being high connect the yellow to ground exactly if it doesn't cross the yellow strip? I'm not understanding what the dotted line represent I guess.

>"On the left, the yellow metal line ties together parts of the gate. In the middle is the blue ground line, which is critical to the operation of the gate."

Is the yellow metal line much much shorter than all the other vertical lines then? The other vertical lines seem to be longer in the pic. Why does input line "A" not cross the yellow metal line but the other 3 do?

What is the actual function of the yellow vertical strip then?

(Note: this explanation only makes sense if you're looking at the diagram in the Z-80 article [1]).

> How does A being high connect the yellow to ground exactly if it doesn't cross the yellow strip?

The transistor gates are the green lines. Line A (polysilicon) is colored both pink and green; it's green where it is a gate and pink where it's just a wire. A signal can only cross the green line (gate) if the transistor is on. So if A is on, the yellow dot is connected to ground (via transistor 1). If B is on, the yellow dot is connected to ground (transistor 2), and so on. The yellow dot is a connection between the silicon and the metal strip (yellow) on top.

The yellow metal strip ties together the three yellow dots, so it will be grounded if A or B or C is high.

But that's only part of the gate. The output (where the resistor is) will be connected to the yellow metal strip if transistor 4 (D) or transistor 5 (E) is on. So the final logic function ends up being rather complex. The point is that MOS gates let you build complex AND/OR functions just as easily as a simple gate.

> Is the yellow metal line much much shorter than all the other vertical lines then?

Yes. The yellow metal strip is just internal wiring for the gate. The other vertical metal strips are long-distance routing from one part of the chip to another. For instance, the blue (ground) metal line goes all through the chip.

> Why does input line "A" not cross the yellow metal line but the other 3 do?

That's really just coincidence. A, B, and C are polysilicon wires, and they are separated from the metal layer by an insulating oxide layer. Think of the metal layer as an overpass above A, B, and C. On the other hand, if polysilicon crosses doped silicon (cyan), you end up with a transistor, so those crossings are very important. I indicate those crossings by changing the line color to green.

It's hard to keep track of what's happening in the different layers. I probably should have made the explanation a bit more detailed.

[1]: http://www.righto.com/2013/09/understanding-z-80-processor-o...

>"The transistor gates are the green lines. Line A (polysilicon) is colored both pink and green; it's green where it is a gate and pink where it's just a wire."

Thanks so much for this explanation. The input and output lines in schematic diagrams have always vexed me. The disconnect between how a transistor is often represented as a standalone 3D graphic such as you have above and how its actually implemented is silicon being the source of my confusion. Have you considered turning these z80 blog posts into a book? You have a great way of explaining things. Cheers.

I just wanted to hijack this thread to say thanks for your deep dives into die reversing. They've really turned what always seemed like arcane runes into some sort of actual understanding on my part.

Pretty much figured that would be impossible until this point.

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