I wonder if RISC-V will be able to keep its simplicity for a long time.
ARM began as a small instruction set as well, and now we have
instructions like the FJCVTZS (Floating-point Javascript Convert to
Signed fixed-point, rounding toward Zero).
For instance the bit manipulation set at https://github.com/riscv/riscv-bitmanip adds frequently used operations like conditional move and population count, but also adds things like "multiply binary matrix" and "generalized or-combine", which I'm not sure even exists in X86 or AMD64.
FJCVTZS[1] seems pretty specialized, but it also seems rather simple. It converts the value in one register and puts the result in another register.
Compare that with say MOVSB[2] from X86, which reads from memory, writes to memory and updates two registers.
[1]: https://developer.arm.com/docs/100069/0607/a64-floating-poin...
[2]: https://www.felixcloutier.com/x86/movs:movsb:movsw:movsd:mov...
Having more and more specialized operations not only adds extra HW for rarely used ops, it also increases the program code size and also compiler complexity.
Standard HN automobile analogy is the subcompact car class has always been the lightest car class on the road, although a 2020 subcompact car weighs about a thousand pounds more than a subcompact did when I was in high school. Think of a 1990 Geo Metro at 1500 pounds vs a 2500 pound contemporary Toyota Yaris. Its always been weird to me that an old girlfriend's Metro weighed 1000 pounds less than the Yaris I own today.
The average American mass has gone from perhaps 150 pounds up to 300+ pounds over the same time frame, so weirdly enough cars are getting fat slower than humans on a percentage basis, LOL. Cars (AND RISC CPUs) don't run on corn syrup, I suppose.
But it is weird how heavy cars have gotten. I guess it's a combination of adding security features and demand for larger cars. I'm in the market for a car, and everything is just a bit larger than I remember for a given class. I dislike big cars, so finding a good fit is annoying.