The reason it matters is because a disproportionate amount of energy is spent in the instruction decode system.
And that affects your battery life.
The reason it matters is because a disproportionate amount of energy is spent in the instruction decode system.
And that affects your battery life.
The “mess”, though, is just a natural artifact of longevity. Many years of decisions that made sense in the moment accumulated to appear to be a “what WERE they thinking?” situation when, in fact, they were addressing the market forces and technology constraints of the day.
In the end, nobody buys your product because the elegant design means that two generations of your product later it will have good performance. Sales are driven by what you can do in the here-and-now. If you do that well enough, you can live long enough to accumulate the kind of cruft that is the X86 ISA.
> In the end, nobody buys your product because the elegant design means that two generations of your product later it will have good performance. Sales are driven by what you can do in the here-and-now. If you do that well enough, you can live long enough to accumulate the kind of cruft that is the X86 ISA.
I think Itanium, or the pursuit of making Itanium the replacement for x86, demonstrated these quite well.
Battery life in benchmarks (and in a lot of real-world use cases) is more about how long the CPU spends in its halted sleep state, and how much power that takes, than its "full throttle" power usage.
Mobile x86 CPUs since Core Duo(?) have the ability to turn off parts of their caches in lower-power modes, for this reason.
[Edit:] I got deja vu, searched my comment history, and found we were still harping on about this exact same crap 9 years ago: https://news.ycombinator.com/item?id=2061500
Even on 32nm, instruction decoding was a tiny % of die space!
Exactly that. Looking what the actual problems with the processors that tried to be better than x86-line were, the good or bad instruction "decoding" was certainly not what made them worse than x86-line, at the end.