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Any chance to compile some benchmarks (spec int) for this and see how well it compare to the original silicon?

You can actually check on the webpage when the simulation is running: on my machine it shows around 17 Hz, so it's about 60000x slower than a 1 MHz 6502.

For comparison, the C reimplementation of the transistor level simulation, running unthrottled and without visualization (I think that's the main performance killer) is about 150x slower on a modern CPU (according to the readme here: https://github.com/mist64/perfect6502)

Is that 150x slower based on single core?

Yes, but IMHO spreading the simulation over multiple threads would be quite a challenge. As far as I understood, the simulation essentially starts with an initial state of high/low nodes/paths, and then for each node, switches each connected node throughout the node-graph accordingly, until the entire chip simulation "settles down", and then moves on to the next node.

Maybe this linear algorithm can be converted to some sort of parallel "cellular automata", which would then probably be a much better fit for GPUs than CPUs.

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