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Comment by blattimwind | Hacker News Reader

Memory latency was in the 10 ns ballpark 20 years ago and still is. This is unlikely to change unless memory is migrated to an entirely different physical storage mechanism.

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It takes light 1 ns to travel 30 cm (i.e. 1 standard body part / foot). So getting much faster must mean getting closer. I reckon it is only feasible if the RAM crawls into the CPU.

>I reckon it is only feasible if the RAM crawls into the CPU. reply

And God said, "Let there be Cache." And there was Cache.

I think the proposal is to solder an entire stick of ram onto the CPU.

Or CPU onto the RAM stick...

https://www.nextplatform.com/2017/02/23/promises-challenges-...

From A Certain Point Of View™, this is what the RPi and SO-PINE compute modules are, except unfortunately they're no longer usable as memory modules per se.

So a level 4 cache?

let's have memory sockets behind the cpu motherboard area !

At this point I wonder why arent CPU vendors experimenting with memory compression. Works great in GPUs. This would have a chance of cutting latency if decompressing a cache line is faster than loading whole thing from ram.

Texture compression works because GPUs are bandwidth-limited in regards to memory. It doesn't really help you when you are latency-limited, because the latency-to-first-byte is the same or slightly larger for compression.

You arent always interested in first byte, besides CPUs operate on whole cache lines. Doesnt matter where the byte is, you will have to wait whole load anyway. We already have memory encryption.

"AMD mentioned a latency increase of 7-8 ns when memory encryption is enabled, which results in a 1.5% performance hit in SPECInt"

Here we would be compensating with smaller data transfers. Wouldnt have to be an amazing algorithm, even RLE would probably give latency improvements.

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