It has already happened in a few places not mentioned in the article, Xeon Phi with high bandwidth memory and broadwell CPUs that could embedded ram as either video memory or a level 4 cache.
It has already happened in a few places not mentioned in the article, Xeon Phi with high bandwidth memory and broadwell CPUs that could embedded ram as either video memory or a level 4 cache.
It takes a very small time window, and very limited historical awareness, to see Ln, for any n, as indicating anything special. In this case, it indicates what we have lately called "RAM" will now be called "L4" -- just as what was so recently RAM is now L3 -- as persistent phase-change memory moves into the place lately occupied by disks and, more recently, SSDs, and the distinction between "RAM" and "storage" gets fuzzy once again.
Even persistence across power loss has phased in and out, over the decades. The slowest memory happens to now be both random-access and persistent, again, and pretty darn fast this time.
> It takes a very small time window, and very limited historical awareness, to see Ln, for any n, as indicating anything special.
This article actually goes through the history of cache additions and talks about how it isn't special and more a matter of evolution. You seem to be arguing against points no one is making.
> it indicates what we have lately called "RAM" will now be called "L4"
This is a bizarre semantic game to play, since cache is fundamentally about a heirarchy of locality and main memory is a way for the entire computer to communicate through storage that may or may not use the CPU.