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Comment by nullc | Hacker News Reader

No interest in 40GB phy?

Right now, 40GB is the sweet spot in lower cost surplus hardware: E.g. you can get Arista DCS-7050QX-32 for about $500 shipped on ebay all day long.

100GB/25GB switches are still really expensive.

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No free 40G MAC/PHY. Unfortunately, the Xilinx CMAC is 100G only, and the Xilinx soft 40G MAC/PHY is $$$$. I have looked in to building a 40G/100G switchable MAC/PHY, but it's going to be a serious pain in the rear.

Funny you mention that switch, we bought one of those off of eBay for our testbed as it supports PTP.

Also, for optical switching applications, one of the most important factors is how long it takes to bring up the link after switching. Because of this, we have no interest in spending time on 40G and 100G interfaces because interlace deskew takes hundreds of microseconds, and 100G also requires FEC which takes hundreds of microseconds to lock. So we're focused on 10G and 25G and running multiple links in parallel, which also provides more architectural flexibility. I added 100G support for three main reasons: the CMAC license is free, so why not?; supporting 100G makes the project a whole lot more interesting than only 10G or 25G, and it provides a simple way of testing the core NIC datapath.

oh... now I understand the purpose of the TDMA. Using actual optical switching to interconnect. Very interesting!

Got any pointers to the sort of optical switching components you're using?

[I've been out of the networking business professionally for almost a decade now, so I'm a bit out of touch with the state of the art in optical stuff--- I was somewhat surprised recently to learn of the existence and low cost of LR4 40gb optics. :P]

That's part of the research we're doing!

Take a look at: https://circuit-switching.sysnet.ucsd.edu/

And: https://arpa-e.energy.gov/sites/default/files/UCSD_Papen_ENL...

The current generation of switches that we're working on uses diffraction gratings patterned onto glass hard drive platters, installed in a modified hard drive, spun by a custom motor controller that's synchronized to the NICs via PTP.

Ha. I was going to guess it would be an AOM, I wouldn't have guessed a diffraction grating on a hard drive platter. That's awesome, and must be incredibly energy efficient.

The cost of switch ports and interconnects could all be dumped into making host interfaces faster, allowing for the switching time to be reduced.

What are the losses between ports that you are experiencing and what is the crosstalk between ports that are not connected?

Crosstalk is better than 30 dB, and double pass loss between ports is 5-8 dB. The switch is basically cycling through three or four different interconnection patterns that are defined by looped back fiber connections, so the signal has to pass through the switch twice.

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