Hyperscan: High-performance multiple regex matching library from Intel
hyperscan.io
hyperscan.io
BSD-license, and they accept contributions. I wonder if they accept any flags that would allow optimization on AMD processors.
[1]: http://intel.github.io/hyperscan/dev-reference/api_constants...
The mechanism is trivial to control IIRC and would not be difficult to patch. It is, after all and unlike MKL, open source.
There's no aspersions cast on Hyperscan at all, just a query about what makes it "truly rare" for the benefit of people who don't have time to study it. It would also be interesting to know how it compares with hardware regex implementations, of which I haven't heard anything recently in connexion with bioinformatics where the interest was.
The genius of the HyperScan team is that they threw damn near every algorithm at their pattern sets, including some they invented, and divvied up the patterns into subsets that fit the particular algorithms well. Usually getting the tests to pass with one backend is the last act of any regex author—once it ain’t broke, you’re too exhausted to fix it. Contemplating the complexity that comes with a multi-algorithm backend makes me want to cry. But HyperScan did it.
So, to put it in perspective with linear algebra, imagine a library that first spent time analyzing given matrices, and then split them into submatrices and operated on them with different algorithms according to the particular patterns detected therein. That’s kind of insane to contemplate in a linear algebra—it’s really not a domain that compares well at all—but it’s how HyperScan works... and that ignores all the crazy ISA tricks it used.
Linear algebra libraries have a ridiculously simple task (by comparison) that can be optimized incredibly well - there seems to be no amount of intellectual effort that isn't worth doing to get 1% more on BLAS given the massive usage of it.
By contrast, Hyperscan has many different subsystems (string search of various kinds, NFA, DFA, various quick SIMD 'lookarounds', different acceleration schemes for NFA and DFA etc. etc). It's enormously complicated already (and a bit unpredictable in terms of the different tradeoffs that can happen) and the optimizations have to be best-effort. We couldn't put in nearly as much optimization into any given hot loop as the linear algebra guys can.
That being said, we've done quite a lot, and many people have picked up useful techniques from our codebase. For example, the string search in Hacker News user burntsushi's regex scanner is an entirely legit (i.e. he freely credits where it comes from) clone of our "Teddy" literal matcher, for example.
I'm no apologist for Intel, but I suppose people running MKL on AMD would complain that it was slow because it was wrongly tuned. Note that BLIS gets quite close to MKL on Intel anyhow, and the timing variance of a typical HPC application is likely to be greater than the contribution of ~10% from GEMM.
I don't know what people do that's MKL-specific, but its major functionality is available in free implementations that will be infinitely faster on POWER and ARM apart from AMD.
Further, Intel has a rich history here. They have been sued and lost over Intel C++ Compiler’s “Cripple AMD” bit. Funny thing is, it's still there. Although now Intel has warnings throughout their pages. Guess removing a strcmp cpuid, “GenuineIntel” was too much work.
Let’s be realistic. Intel wants to win the benchmarks. There’s no need to construct an elaborate reality where this is all done out of concern that they might make performance worse on microarchitectures they did not design.
> https://github.blog/2018-10-17-behind-the-scenes-of-github-t...
Github: I didnt opt-into 2FA: #439658 (3rd party auth required without 2FA)
> Since April, we’ve worked with cloud service providers in private beta to scan all changes to public repositories and public Gists for credentials (GitHub doesn’t scan private code).
Private repos are not scanned.
Honnestly, once you understood (some of...) the math/automata details, this is by far one of the best big codebase ever written.
So clean, beautiful, powerful. I've learned a lot from this codebase.
Does anyone know more codebases as well written as Hyperscan ?
Can you disclose how/why you were reading Hyperscan source for work? Just curious, no agenda.
It was for a (now failed) startup selling IPS appliances. What really helped us in the end was that we could run the runtime in C (C++ was not possible); however the compiler/tooling we used was fairly old (...) so I had to dig into the codebase details to make it work.
As a side note, if I had to say something bad about Hyperscan, it would be the lack of high level documentation. I don't know now, but back then only a couple of blog articles available... I always had been curious : was it something intended to prevent copycats ? Lack of time ? Why not try to explain more the high level math/automata details ?
If the high level documentation were to be improved, I'm pretty sure the number of companies integrating Hyperscan would increase, hence Intel sales would increase (since it has been bought by Intel ;)
Later: well, there is a Hyperscan paper and there may be more material coming out later.
Also, not to be a jerk, but a lot of people claim that they will read/understand/use this kind of documentation and my experience was that only a fraction actually do, and of those fraction, most of them don't behave in a way that's actually useful enough to justify having made all those docs. One is more likely to wind up with people kibitzing and making inane tweaking suggestions ("use more NFAs! no, use more DFAs"); less likely is meaningful OSS contributions or using the software when they might not have before.
https://intel.github.io/hyperscan/dev-reference/compilation....
I use FLRE: https://github.com/BeRo1985/flre
That is also an impressive project, with multiple subengines from which it chooses the fastest one. All written by one guy. Basically no documentation though
I wonder how the performance compares
The major headache is the prospect of loops that are bigger than 1 character position - these aren't as trivial to express (I have ideas, naturally).
I don't know how well this fits in with Tensorflow - it may be too finegrained? But of course, getting onto custom hardware can yield massive speedups.
Also, the limitations of Hyperscan might be quite noticeable. It doesn't support all pcre facilities (e.g. capturing and arbitrary lookaround). It has a considerable compile time - I wouldn't want to use Hyperscan to grep short files! Justin Viiret (another ex-Hyperscan team guy) has a blog post about this comparing our relatively heavyweight optimization strategy with RE2 (which gets down to the business of scanning a lot quicker than we do). You can find it here: https://01.org/hyperscan/blogs/jpviiret/2017/regex-set-scann...
(sorry about the giant 01.org "dickbar", we couldn't control that)
The upshot is that most people looking for big collections of regexen in huge amounts of data aren't really running 'grep' type tools. If someone wanted to do that, like I said, it would be a good project.
30 regex and 1 meg of data for example.
I'm somewhat curious as I have a couple of scraping things I do where I can compile the regex once and keep it hanging around (or save to/load from disk if that's feasible) for 3 to 5 minutes at a time.
However, the compile times of HS for 30 regexes might be not entirely trivial (maybe a second, probably less). A megabyte you'd probably see benefits but I think the benefits might not be drastic.
Probably the best way to find out would be to fire up hsbench (a tool that comes with Hyperscan now), figure out the slightly weird corpus format (sorry) and get some numbers for yourself on your own workload.
It would be an interesting project to add Hyperscan support to it. You would get all the extra goop you mention for free. I would be happy to give guidance on that if anyone's interested.
Make custom ASIC with non universal algorithm is too expensive.
For context, see slides 5 and 6 about the history of Hyperscan and Sensory Networks Inc.: https://openisf.files.wordpress.com/2015/11/oisf-keynote-201...
Here is a real history https://twitter.com/joeerl/status/1115990630793207808
I think FPGA could do a great job of achieving worst-case performance by simulating NFAs in a very straightforward fashion (beating s/w). However, no-one does this as the headline numbers are terrible.
The thread you posted contains an assertion by someone who built an FPGA parser with no performance numbers to back it up; the performance comparison may well reflect relative skills with software and hardware as opposed to the limits of software. Interestingly, one of the first responses refers to another project of mine. :-) (simdjson). Unfortunately, given the subsequent posts on the thread, it does not look like the author can provide further details on the system, which is sad.
It often can, because it can clock 50x higher.
And if you want a fair comparison, customize both to the job.
But if you ever need it FPGA instance it is not so expensive as you think https://aws.amazon.com/ec2/instance-types/f1/