Arm Shows Backside Power Delivery as Path to Further Moore’s Law
spectrum.ieee.org
spectrum.ieee.org
Whereas just doing power delivery on the back side is much simpler proposition and you could likely make simple transistors to give you the ability to switch more fine grained power domains on and off for even better power and heat management.
With logic operating at such low voltage, the current you have to supply to the die is very high even in "low power" chips, and you begin suffering significant copper losses over single millimetres.
If you can put a DC-DC converter on the chip itself, that problem is solved.
They still use FIVRs on mobile chips, except they managed to put inductors in the substrate now
https://www.psma.com/sites/default/files/uploads/tech-forums...
What Intel was saying is that they had an on-die industrors ready in labs, but never stated if they are going into production.
Well is talk about DC-DC being made along with logic or with a separate analog process?
With the second, chip scale bucks were certainly made.
GaN grows on Si nicely, and ferrite-on-si is also a thing.
GaN on Si could work, as could ferrite based inductors, but at least for the foreseeable future it doesn't seem like the incentive is enough to make it a wide scale thing. Probably heterogeneous integration stuff like say maybe chiplets, flip chip bonding, etc. might be the route if GaN converters get integrated.
Wafer thinning is used extensively in stacked-die products which have become common in recent years.
This looks like an incremental change applying the tech from image sensor/memory technology to standard silicon. Although, I'm not sure why they chose ruthenium.
"Imec Presents Copper, Cobalt and Ruthenium Interconnect Results"
https://semiwiki.com/semiconductor-services/ic-knowledge/756...
Cobalt needs a barrier to prevent mixing under some circumstances where it contacts copper. Ruthenium doesn't need any barriers but chemical mechanical polishing (CMP) processes for it still have problems.
Here we are talking about building elements on the backside and then connecting them to the front side. It is much trickier.
Perhaps what they're proposing is more sophisticated, but definitely not something entirely new.
> The only trade-off is the complexity of manufacturing the backside network, Prasad noted. To make it, the frontside of the wafer must be fully processed, including the construction of the buried power rails. The wafer is then flipped over, and the silicon is removed down to a mere 500 nanometers thickness. Then vertical connections less than 1 micrometer across, called micro-through-silicon vias (microTSVs), were built to contact the buried power rails.
Even without costs of TSVs, a double sided wafer costs twice the normal one, while you can at most squeeze like 20-30% more things onto it, given that the backside will only be usable for lower tier logic or analogue process.
If you ignore the TSVs the back of the wafer has zero circuitry constructed on it.
Moors law implies exponential improvement up to the the physical limits we hit over the last decade on each process shrinkage (this is also explicitly defined in Moore's paper) i.e Dennard scaling, this is possible because roughly speaking when you shrink the process, you reduce latency (allowing faster clock with the same design or new larger design i.e double transistors with same max straight line latency) without increasing power consumption or absolute heat dissipation requirements - it's almost "free" if you can keep shrinking it which is why you get exponential improvement if you can keep halving.
Media have completely watered down the term into a flowery synonym for "somehow improve".
There are many ways forward, I'd say even too much of them. Too many people are trumpeting "the death of silicon" or CMOS, and too many people are focusing on "revolutionary" solutions
1. Improvements tend to be of the form "X% better by the way we are measuring it."
2. Improvements tend to come at a consistent rate.
This means that the overall trend includes many one-off improvements which do not look related to anything else. And indeed are not except that business pressures say, "We have to figure out how to do X by time Y because that is what we expect our competitors to do" and therefore create an environment where people are constantly looking at the next barrier to improving at the expected rate and are finding improvements at about that same rate.
The Innovator's Dilemma has a good deal to say about the ubiquity of exponential improvements in various fields of technology. Moore's Law is by far the most famous, but is also not unique. Whenever an industry has agreed on a clear metric for "better" and is in a race to deliver it, they tend to get exponential rates of improvement until they either hit a physical limit, or sufficiently overdeliver customer needs that nobody cares any more.
Historically at different times we have had exponential improvement on everything from producing batteries more cheaply, being able to scoop more dirt with a backhoe, or increasing the range of steamships.
>Generally acronyms and initialisms are capitalized, e.g., "NASA" or "SOS." Sometimes a minor word such as a preposition is not within the acronym, such as "WoW" for "World of Warcraft". In British English, only the initial letter of an acronym is capitalized if the acronym is read as a word, e.g., "Unesco."
I've always said ARM (as in each individual letter) when talking about ARM processors and it's never even occured to me to pronounce it like Arm.
That being said... I do pronounce RISCV as /rɪsk-viː/ (or, as I believe was the intention rɪsk-faiv depending who I am talking to) and that seemed entirely normal as opposed to pronouncing each letter in the Acronym...
So maybe I'm just weird here...
Since RISC-V is longer I pronounced it the same as you; /rɪsk-viː/, the same as to NASA and NATO.
They don't call themselves the Uk, do they?
"ARM stands for Advanced RISC Machines, the name given to the company when it was spun out of Acorn Computers back in the day. It was abbreviated to ARM when the firm went public in 1998."
It was always abbreviated to ARM, ever since the 1980s. The whole reason for "Advanced RISC Machines" was to match the acronym they already had.
This is the second time I've seen someone make this claim online and I wonder where it comes from. IBM's name is still officially "International Business Machines Corporation (IBM Corp.)" according to this legal statement:
https://www.ibm.com/privacy/us/en/.
As for how it's referred to in practice, I've always heard it called IBM for as long as I can remember (at least back to the 70's) and I think that's been the case for much longer.
They were Acorn at that point. That's why the CPU was called Acorn RISC Machine (singular). There was never any company called "Acorn RISC Machines".
Let's look at a very big chip, 3cm a side. Once you thin it to 500nm, the volume is .45 cubic millimeters. Since Ruthenium has a density of 12.2, it would take 5.5 milligrams to make a version of the chip that was solid Ruthenium all the way through. That's 4.4 cents.
So they're saying some stimulation applied in a proper place gets things going faster?