Ok, if it's like that ("intentionally detecting cpu features wrong") then I would agree.
Can a "CPU feature" (e.g. sse2, avx, aes, etc...) be implemented the same way between different architectures?
Can a "CPU feature" (e.g. sse2, avx, aes, etc...) be implemented the same way between different architectures?
And the call/use of these features is the same for AMD or Intel