Thermal chambers are quite expensive, around $100,000 per unit. So bigger shops such as Intel, AMD, Qualcomm probably have many. But I would be surprised if smaller companies have more than a couple.
It is a painful process when a company develops their first system. As you would guess, once they have a proven PCB design with DDR controller firmware, the DDR sub-system design is reused in subsequent systems.
Now say you've been shipping the system for a couple of years. There is one situation under which the above experiments will need to be performed again.
Say your system uses a 16GB DIMM. Micron and Samsung, the DIMM makers, are always trying to improve their manufacturing process, moving to the next node (14nm to 7nm) and so on. So every couple of years you'll find them EOL-ing (End of life) a certain 16GB DIMM for a newer one. There is a chance you'll start seeing failures with the new 16GB DIMM.
> I also thought much of the difference in length on the PCB is compensated by with those wiggly traces (so all have equal-ish length), but you still need to compensate for it? Or is it just to gain a larger error margin?
You are partially correct.
Check out this image: https://www.systemverilog.io/ddr4-initialization-and-calibra...
PCB Board designers match the length of the data lines, which are hooked up in a star-topology from the processor to different DRAMs on the DIMM.
But the address lines are hooked up using fly-by topology. So data signals launched from the processor arrive at all the DRAMs at the same time. But the clocks and address signals that are launched from the processor will reach each DRAM on the DIMM at different times. So, initial calibration compensates for this.