I'm not seeing how this works. Let's say R1 and R2 are 8 bits each, and the attacker chooses n=2. Let the parties by C (car), F (fob), and M (attacker).
So C starts sending R1, M starts receiving R1, and after relaying 6 bits of R1 M guesses the last 2. Let's say M gets lucky and guesses correctly. So now M has the 6 bits of R1 it received from C, plus the 2 it correctly guessed, and so it has R1, 20 ns earlier than it should.
But to get F to send R2, M still had to send those 2 guessed bits on to F. That's 20 ns, assuming a fixed bit rate on the physical layer, which is how I assume these kind of systems would be designed. That should prevent M from learning R2 early.
The hardware I was envisioning for this would have a shift register on F that gets loaded with R1 xor R2. As the range finding bitstream comes in, it would shift out the bits from that shift register, xor them with the incoming bits, and transmit the result.
Similar on C. Load a shift register with R2. As echo bits come in, shift bits out of the shift register, xor with the incoming bit, and shift the result into another shift register (or get fancy and do this all with one circular shift register). At the end of the echo message, if the output shift register is all zero, it got the right R2.
Note that with this implementation there is no aborting on F if it receives the wrong R1. The wrong R1 simply makes it send back the wrong R2.
(Note: this design assumes that C and F both can simultaneously transmit and receive).