Tin Plasma Extreme Ultraviolet Radiation Makes 5nm Integrated Circuits Possible
trumpf.com
trumpf.com
Both of them mention how Intel is sinking billions of dollars into ASML to try and get this process working, and how impossible everyone thinks it is, so I'm skeptical that they finally got everything squared away now :)
To figure this out, draw a square, and each node is an exposure.
This process works forever in theory, but is limited in practice by the mutual registration of the exposures.
See here: https://en.m.wikipedia.org/wiki/Multiple_patterning
Edit: the exponential rise happens because to go 2x smaller I now need to double my # of masks. Of course, in practice overlay accuracy could kill you first.
Intel claims EUV is now at production volume and ready for manufacturing introduction on the 7nm node, even at 75-80% EUV machine uptime.[1] At the kind of production volumes Intel is capable of sustaining, and ASML's projected machine throughput, that means they've got more than a dozen of these machines operating in Fab 42 (likely closer to 40-50 if they want to hit a projected 100k wafer starts/month target, with extra machines to make up for the excess downtime; UV litho machines can easily run with 90+% uptime). That should be an enormous win over the current quad patterning they're using at 10nm, cutting out tens of process steps.
This stuff is incredibly challenging to get right, but they've been working on it for over a decade and the machines ASML are building now are production machines, not prototypes. And now from the linked article, it seems Trumpf's also made it to production equipment.
Once everyone's had more time to operate these machines at scale and really crunch out the bugs, we'll see how far we can continue to push physics on making these tiny etched transistors. 5nm shouldn't be an impossible step with EUV, but the stochastics after that node could make 3nm and smaller logic very questionable.
Magic box I hold in my hand to communicate near-instantaneously with the other side of the world... somehow less impressive.
John Higgs: Stranger Than We Can Imagine an alternative history of the 20th century, p. 5
EDIT: And bring back live video.
Trumpf is generating nanoscale EUV but I'm still hammer nails into the wall to support my coat hanger rod. What's up? Where's my flying cars, etc.
Meanwhile, micro-machines are everywhere these days - MEMS accelerometers and gyros and SAW MEMS microphones are in every cellphone made, every smartwatch has similar features, DLP TVs have actually gone out of style but were micromirror devices, MEMS barometers and altimeters are cheap and commercial drones commonly have one or more, MEMS cell sorters and biochips are actually being used in production medical labs, the list just continues on for ages...
(I could go on a long aside about the households comment, but I'll save that rant for another time. Suffice it to say, we're doing jack shit with technology in homes, and that alone is hugely depressing. Innovation in that space seems to be sorely limited to what you can bring in and plug in to a socket, rather than disrupting home designs to better fit what our technology is actually capable of pulling off today - just look at the absolutely pathetic state of residential air conditioning, vs what can be done with passive cooling and occupant-aware HVAC systems.)
I think the problem there is the churn. If you built a 'smart home' ten years ago, it would be worse than useless now. I do think we're due a shift away from 110v outlets everywhere, but I think a house that's in keeping with the technical possibilities will have to wait until those possibilities have stabilized.
I know this is nitpicking, but still: I disagree. I think that home would be more useful than a smart home built today, because basic sensors and actuators today are very similar to those of 10 years ago, they talk over the same protocol (you screw your LED bulb into the same socket you used to screw an incandescent one into before), and most importantly, none of that was tied up with third-party Internet services. Consumer IoT of today is complete garbage because every vendor wants to be a platform, and doesn't want to interoperate with anything else. Back before IoT was a thing, home automation stuck to standards.
If people wanted to burn money on certain super futuristic products, there would be more of them. But they've been judged not worth it.
You don't need a flying car - you need a hole which you can jump in and pop out at your destination with the least hassle.
As a tangent, I think it's a time for reminder that life itself is nothing but molecular nanotechnology that we didn't invent and don't control yet. There are already nanomachines all around us, and we're all made of some. So whenever you use a piece of tech with an organic component (whether dead or alive), take a moment to ponder the extremely advanced nanotechnology involved ;).
There are glues for this nowadays if you want but personally I don't mind the screw or nail. Screws and nails are a 'good enough' solution for the problems they solve and anything else would have to be much better to really compete. The glue exists, you can buy it but it has a shelf life and does not have the same shear resilience that a screw or a nail would have.
Technology should first and foremost solve a problem.
Flying cars would create as many problems as they would solve, we barely manage with two dimensions, three would be a lot harder especially with large numbers of vehicles in the air. I don't see that working at all from a physics perspective but if we do somehow get it working to where it can compete favorably with regular vehicles on cost then it will require central traffic control.
I know what you mean. I'm going to have to quote William Gibson on this:
"The future is already here — it's just not very evenly distributed."
A lot of people spin nonsense about that.
Consider the hoary myth that integrated circuits are a spinoff of Apollo. What actually happened was that the early Apollo program ordered a bunch of chips from the early vendors and helped qualify them. They didn't invent ICs, they didn't make ICs, they weren't even the biggest market for ICs (that was the Minuteman II missile, which made many more computers w. ICs than Apollo did.)
The genuine problem with tin plasma laser is its power efficiency. An early adopter runs can bare with 0.02% energy efficiency, but imagine, say, a few 20 line fabs and their power consumption.
Another very important advantage of this design would be getting a more stable, easily tunable, and more narrowband light source. Tin plasma has around 1nm deviation in its spectrum, while a cyclotron can get to picometres on an arbitrary wavelength.
And with all above, you get a supremely tempting option to try diffractive optics, and do away with all geometry imposes nonsense of EUV reflective optics...
Assuming you need something like 1e5 transistors to approximate one neuron, you'd need like 100m^2 of die area and interconnect to actually emulate a brain.
The machines that create the masks are also not very fast. A mask is created by firing an electron beam which is a sequential process.
If you were limited to one wafer per mask then not only would each chip cost tens of thousands of dollars you would also only be able to produce a single digit amount of wafers per year.
These are already all problems for EUV and limit its lithographic resolution compared to the theoretical diffraction limited resolution.
Generate, yes. Focus? Not so much.
Edit: Phase mask mirrors ('surface profile' fresnel zone plate) do exist though.
Smaller transistors require less energy to switch, and also switch faster.
https://spectrum.ieee.org/nanoclast/semiconductors/processor...
The binaries of Firefox on Debian Stretch (oldstable), when just counting the main program binary and .so files, amount to about 100 MB of compiled code. These are stripped hence will mainly consist of binary code and constants.
Making a flip flop in hardware requires 6 transistors IIRC. What if I compare 1 bit in software with 1 flip flop in hardware--OK, code is constant (could be etched as a PROM, but that's a useless comparison), but represents some complexity that probably needs more transistors to represent. E.g. an if statement (after evaluating a value to be dispatched on) needs a conditional jump assembly instruction (8 bytes?), and perhaps another jump instruction when the success branch is finished (another 8 bytes). This comes down to 128 bits, 768 transistors with my stupid calculation; enough to route data etc.?
So, encoding a program of the complexity of Firefox (binary part) as hardware would then need 100e686 = 4.8e9 transistors. Given 100e6 transistors per mm^2, this would need 48 mm^s chip area, a chip 7mm*7mm, not far from what CPUs use?
Thus, today's web browsers and CPUs seem to be comparable in complexity? Or, a web browser could be encoded entirely as hardware and about fit on a chip? I find that unexpected and a bit surreal, loading a huge program like Firefox is just bringing in the same amount of complexity into the running system as there already is active in the CPU? Or, another line of expectation in my thinking is, CPUs are very small compared to the large programs, programs are being serially executed with a smallish set of instructions precisely because complexity in Hardware needs to stay small. Actually maybe that's not really true?
I'd welcome better insights.
Most memory devices, like pendrives use that.
Like intel's fastest gaming processor, the 9900k, the major difference is better heat dissipation material between the die and heat spreader.
laptops and phones are mostly all thermally limited
die shrinks help with this, but only if you don't increase performance as you do it.
The problem is not simply "because clock cycle" it is "if electron takes Xns to get from one execution unit to the next, then that's Xns of functionally idle time". That at best means additional latency. The more latency involved in computing a result the more predictive logic you need - for dependent operations the latency matters.
An asynchronous chip does not avoid that same problems encountered by a multistage pipelined processor, it's purely a different way to manage varying instruction execution times.
But this doesn't answer the killer problem of yield. The larger a single chip is the more likely any given chip is to have errors, and therefore the fewer chips you get out of a given wafer after the multiple weeks/months that wafer has been trundling through a fab. Modern chips put a lot of redundancy in to maximize the chance that sufficient parts of a given core survive manufacture to allow a complete chip to function, eg. more fabricated cache and execution units than necessary, at the end of manufacture any components that have errors are in effect lasered out. If at that point any chip doesn't have enough remaining cache/execution units, or an error occurs where it can't be redundant, the entire chip is dead.
The larger a given die is the greater the chance that the entire die will be written off.
That massive ML chip a few days ago worked by massively over prescribing execution units. I suspect that they end up with much greater lost area of a given wafer than many small chips, which directly contributes to actual cost.
To an extent this has already happened with wafer scale integration, e.g. cerebras.