IOW: How is that AMD is now poised to eat Intel's lunch? Is it too good to be true?
From my lofty perch in my armchair, I consider that from Intel's perspective that Ryzen 1st gen was cute. Ryzen 2nd gen was getting a little closer to home, but still didn't really pose a real issue. Ryzen 3rd gen? It just took a giant dump all over Intel in multithreaded workloads up and down the Z390 SKU's and took a seriously devastating shot at X299...without AMD's 3950X even being available yet. Even where Intel wins, it doesn't win by far enough to crow much.
The strange new day that dawned on 7/7 was a good one. As someone who built his first machine on a K6-2 333Mhz chip and his last on an FX 8350, long may it continue.
* The other pleasant surprise this weekend was Navi. Better than expected performance. Surprising reduction in power draw. Nicely priced (thanks Super!). Pity that they still haven't gotten over the space heater blower design. Hint guys: it doesn't work. Much cooling...little problem.
Memory isn't discussed enough and its importance is usually severely underrated. Moving from L1 to a register uses almost 2x as much power as doing an ADD. Moving from L3 to a register uses over 15x as much power as that ADD. Moving from RAM uses over 60x as much power as that ADD.[source](https://hpc.pnl.gov//modsim/2014/Presentations/Kestor.pdf)
Navi is a dramatic shift in architecture (despite a lot of people seeming to dismiss it as minor). The new cache design keeps data much more local reducing latency and (more importantly) total power consumption. These in turn allow the more efficient SIMD layout to be fed more consistently.
The entire July 7 launch was all about "pipe cleaning" in my opinion. AMD's eye is on those big console and cloud contracts. They aren't selling Amazon or Google a Zen 2. Instead, they are pairing it back-to-back with Zen 3. That will be their second take on 7nm and should have any potential issues worked out. Likewise, they aren't selling these Navi chips to big companies. They will be selling the next, bigger iteration for corporate use.
I think PCIe 4 caused them to rush Navi out the door. July 7 has been setup as a kind of makeover for AMD and PCIe 4 is what ties x570, Navi, and Zen 2 together. If AMD doesn't have a PCIe 4 card at launch, it's a huge marketing loss. A half-baked Navi that offers a bit of improvement is better than nothing.
I'm betting that performance per watt get quite a bit better by this time next year when the big clients are finally ready to purchase.
I think it's a triply unlucky time for Intel who has:
- An aging CPU architecture
- An aging node due to their in house 10nm being many years behind schedule. Squeezing blood from a rock with refinements at this point.
- A bunch of security vulnerabilities that don't affect other CPUs
Not to say AMD hasn't been doing a good job with improvement, design, and innovation it's just that Intel's failures have been driving the shrinking difference as well. It only takes one of these 3 to change for Intel to have a huge jump itself.
It might just not last long enough. Athlon64/X2 also totally destroyed Intel but Core architecture arrived before AMD was able to grab more market share.
One of those offers costed them $1.25B more than they expected but was totally worth it.
For example, Intel gets a lot of money but also "gives" a lot of money in the form of "incentives" / tip / kickbacks to a lot of hardware manufacturers and the usual palm grease to an army of managers, execs, tech "journalists", governments, etc.
To be noted, they also have been competent enough making chips most of the time.
That's hard to do when your R&D budget is shattered. Intel was fined for far less money than they caused damage to AMD.
What Intel needs to be careful about is while they fend off AMDs attacks in desktop/server also need to keep an eye on ARM coming after them on mobile. How long until Linux based Chromebooks come with Qualcomm CPUs like 7cx become standard? The chips are better than Intels low TDP offerings so long as they don't have to emulate x86_64. They could spend all their money on a phyrric victory crushing AMD only to lose a different market.
It's a tough job being king with upstarts always after your neck.
Nowaday computing culture has shifted, new brands, new idioms and devices .. intel is a beast for those in the knowings of silicon processors but for the market .. a lot less than before (samsung, apple, exist now )
That is not 100% accurate. First being Athlon 64 didn't destroy Intel. It was good, but businesses were still buying Intel for stability reason. AMD's chipset at the time, were no where as good as Intel, especially in the I/O speed. The WinTel Alliance meant all the software, from library to compiler were optimise for Intel.
Now the market is multiple times bigger, we have many Open Sources alternatives, like LLVM and GCC, the Web Stack are mainly open sources meant optimisation is a lot easier. I/O and Chipset are no longer a problem due to maturing IP selection from Multiple vendors. No longer will AMD has to do it all by themselves. The magic of Licensing IP and Pure Play Foundry. And Nadella Microsoft is an entirely different Microsoft than 20 years ago.
Finally it wasn't necessary the Core architecture that killed AMD, AMD went downhill with Bulldozer design and lots of execution problem. Basically they have their own moment of Pentium 4, except when Intel had the resources for a backup plan ( Core ) and able to sustain losses while they figure it out, AMD had nothing. It took them nearly 15 years to get out of it.
While it's possible there is a pile of undiscovered issues that will exclusively impact AMD's processor line, I doubt that's the going to be the case. Intel's issues are far bigger than just x86. They've had major screw-ups and public exits from multiple markets including: mobile, IoT, wireless radios. They appear to be having execution issues generally and their architecture issues started 20+ years ago. This is what technical debt looks like when the bill comes due.
Zen 2 CCX is 31.3mm^2 according to AMD's slides. The Zen 2 chip is 74mm^2 and 3.9B transistors. We can use this to get the transistors per mm^2 and multiply by the size of the Zen 2 CCX to get a transistor count of 1.65B.
Something is weird about these numbers. We go from 1.4B to 1.65B transistors. That seems "reasonable", but something is wrong with our cache figures. Zen 2 has 2x as much L3 cache and the L3 on Zen 1 takes 373M transistors. If we just double that, then Zen 1 is actually larger at 1.77B transistors. If we assume they simply didn't count the extra L3 and attempt to add it back, we get over 4B transistors for the chip when it's only 3.9B transistors (including uncore things like Infinity Fabric).
Any way you look at it though, Zen 2 cores can't have many more transistors than their 12nm counterparts, so the node obviously isn't what makes Zen 2 work. Also keep in mind that the 74mm^2 cores are smaller than the 125mm^2 IO Die which is on 12nm. The die shrink was mostly about power savings and fitting two chiplets + IO die on the AM4 package.
That said, Intel's 8-core chip is around 175mm^2 (they quit releasing those numbers about the time the 10nm fiasco started). Zen on 14nm was 215mm^2 (keep in mind that Intel's 14nm is roughly equivalent to TSMC's 10nm). AMD's part comes out bigger at the 8-core mark, but things change when we start looking at their larger chips. 10 core Skylake is 322mm^2 and 18-core is 484mm^2. Adjusting for the extra transistors in the zen 2 CCX, Zen 1 would be around 235mm^2 at 14nm. Shrinking to 10nm would give a chip smaller than Intels, but also without an integrated GPU. I'd guess they are about equal in transistor count which means Intel isn't super likely to pull ahead even if they could get 10nm working.
https://www.anandtech.com/show/14525/amd-zen-2-microarchitec...
https://www.tomshardware.com/reviews/ryzen-9-3900x-7-3700x-r...
https://en.wikichip.org/wiki/amd/microarchitectures/zen#Zepp...
There will be lots of Ryzen Laptop coming, for reason that has little to do with Ryzen 3000 in itself, ( The Zen 2 APU will be coming next year ). It is Intel prioritising 14nm capacity for the high margin Sever shipment. Giving AMD a chance in this segment .
The timing of these events are.... ( I can't find a word to describe it.)
I would assume the answer to that over an unconstrained period is "yes". Intel made a couple big mistakes in architecture and process and AMD made a couple mistakes before that. It's a bit like watching too exceptionally competent contenders - the winner is frequently not the marginally best player, but the player who didn't make the first mistake.
Here, from the comfort of my seat, it's a very entertaining match. I wish there were more players, but neither IBM nor Oracle feel a need to compete in the low-end, and ARM seems destined to eat this cake from its borders.
That'd more or less break the laws of physics. There are limits of how much (or how little) energy one needs to do a certain amount of computation and, considering all the branch prediction, speculative execution, cache pre-fetches, and all the black magic that we need to extract reasonable single-thread performance from our CPUs, we are pretty close to that limit.
We may get away with some ISA and compiler-based optimizations to extract safe no-brainer (as in the CPU doesn't need to worry about it) performance in lower power designs, but it's pretty clear that single-thread performance is the enemy when it comes to power efficiency. And we kind of tried that with VLIW and we didn't get what we expected.
From time to time I check builds and performance on POWER. There is a Brazilian university that provisions POWER9 systems for free (for short times). I am not sure how actively IBM collaborates with glibc, gcc and clang crowd or how dedicated to make Linux workloads perform better on POWER than they do on similarly priced Xeon boxes. I also know Intel has some hard-to-find non-commercial licenses for their compiler and performance analyzers one can use to fine tune their code to Intel architectures (and make it terrible on anything else ;-)) which is perfectly fine if you know what CPUs your code is going to run on (as it frequently is with HPC).