Alpha is bae. PowerPC is great as long as you don't look at the fever dream nightmare that is it's supervisor state.
Alpha had a weakly-ordered memory model though.
Yeah, but it wasn't that big of a deal in practice. I sort of like that it was such a weak memory model that you just explicitly had to synchronize any sorts of cross thread comms.
MIPS never had any memory model at all! They might have one, by now, most likely cribbed from PPC, ARM, or Itanic. Or maybe more than one!
Want one? I've got a 600mhz sitting in the cost. Totally works. I'm in Los Angeles
Haha, my partner would be unhappy if I came home with another stray, but I appreciate the offer. : )
Hrmm. I could do a login if you really want. I have an openvms and netbsd disk.
I've been trying to not take this thing to ewaste for a decade
How annoying were the branch delay slots?
You could always put NOPs into delay slots by default and replace them later with something more useful.
no, you could not "always" find something useful to put there later. gross exaggeration
You misunderstood parent. They meant you can always nop the branch delay, and you might find something more useful for it later
that may have been what they wanted to write. unfortunately they wrote something wrong and misleading instead. i understood what they wrote perfectly well and the implication therein isn't, somehow, my fault
The "always" qualifier does not apply to anything after the "and". Why do you assume it does? You are being very combative and pedantic so I assume you have a diehard rule for this that you can reference? Like some english grammar handbook?
Less so than register windows :)
From having read lots of disassembled MIPS code I can tell you that they become second nature very quickly.