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Comment by femto113 | Hacker News Reader

"After all, there aren’t many numbers left between 5 and 0."

Math purists may roll their eyes at this statement and clearly even if you are obsessed with integers you can just switch to picometers, but I wonder if it is time to start counting atoms. The diameter of a silicon atom is about 0.21 nanometers, so a 5nm process is dealing with features only about 20-30 atoms wide.

(edit: found more accurate diameter number)

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Wow, this puts things in perspective for me. I knew 5nm was small but I didn't really realize how small until we started getting into "I-have-more-dollars-in-my -wallet-than-this-thing-is-atoms-wide" territory.

One thing I’m always amazed with - and it’s partly due to my lack of understanding of physics at this scale - is that when a processor with components on this scale is dropped a few feet, they aren’t reduced to smithereens. It’s hard for me to contemplate that whatever is holding these few atoms together is so resilient.

If you find that amazing, contemplate for a moment how nuclear fission and fusion work and the amounts of energy involved there. Apart from a few comparatively exotic things (black holes, neutron stars, etc.), some of the largest force densities that exist are all around us in atomic nuclei (of course, those forces also decay very quickly with distance, but that's a different matter).

The "components on this scale" are pretty light so there's not much force when you accelerate them. If a drop doesn't crack the silicon wafer it's not going to shift the bits and bobs on it.

Not sure how correct this is, but I think of silicon as basically a small metallic rock.

They are made up of a solid lattice, the components are formed by differential doping. There is some migration, but it is far too slow to have an effect over the lifespan of our electronics.

Physical inertia is meaningless over other forces involved in the lattice.

The node label (e.g. "5 nm") no longer represents a physical dimension and hasn't for some time -- it's simply a continuation of a naming convention. In fact, while we used to scale down transistors by simply reducing the gate width (where the naming convention originated) we now take far more elaborate steps to do so.

Fin width is around the same size as the node name, but yeah gate length at 7nm is nowhere near 7nm.

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