Reposting this from the other day: https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/

Paper: https://www.cl.cam.ac.uk/research/security/ctsrd/pdfs/201406...

"Motivated by contemporary security challenges, we reevaluate and refine capability-based addressing for the RISC era. We present CHERI, a hybrid capability model that extends the 64-bit MIPS ISA with byte-granularity memory protection."