TSMC and OIP Deliver Industry’s First Complete Design Infrastructure 5nm Process

A little bit of both. Intel's 10nm is now officially 2 years late. If they had 7nm now they would still be in the lead given its ( original ) 7nm plan were roughly equivalent to TSMC 5nm.

TSMC also gained lots of momentum from the Smartphone Revolution. All of a sudden you have a 1.3B Smartphone Market, from SoC, Wireless BaseBand, and all sort of other component Fabbed with TSMC, compared to Intel's 250M PC Market. Now of course Intel make many times higher margin, but considered TSMC has a diverse group of clients utilising its current and old Fab compared to Intel doing it all by themselves, TSMC now has similar resources to Intel and innovate.

And compared to Intel which has big leaps across generation, TSMC's approach were to iterate, so you get 16nm, 16mn+, 10nm, 7nm, 7nm EUV, 5nm EUV, all of them were iteration of previous generation.

TSMC manufacture circuits based on customer design, this could be CPU, 5G modems, SoC, GPU etcetera. TSMC is like circuits printing company. Therefore it is more difficult to compare progress of TSMC versus Intel. But also, because they print so much (and so diverse) nowadays, they get priority at all the semiconductor machine companies.

Don’t conflate “effective feature size” (the 5nm used in this article) with “real” feature size (or, more importantly, pitch), with transistor size. Transistors are still huge compared to atoms—think hundreds of thousands, or millions. The issues at this scale are all electrical. (Bullshit terms like “quantum tunneling” are bandied about; the scientific use isn’t wrong, but any journalist using the term probably is.)

There’s alot of room down there, below the extended Moore’s law, just not always so CMOS-ey.

Interestingly, the semiconductor industry has thought it was close to its theoretical limits since feature size was measured in microns 40 years ago. Back then, one of the big worries was that we were approaching the wavelength of light used in the photolithography process and that there was no clear path to getting below 1000 nm. I expect that it will always be difficult to see beyond a few years of innovation in this area. It certainly does seem that we will soon need to switch to other materials and forms of signal transport though.

Layman POV:

- TSMC are the only company currently shipping real products at 7nm, and 5nm is a full generation ahead beyond that - nobody else is anywhere close to 5nm.

- Samsung will have a 7nm later this year that is broadly equivalent to TSMC's current 7nm (data point: the Galaxy S10 ships with either the Exynos 9820 on Samsung's "8nm" (enhanced/rebranded 10nm) process, or the broadly-similar-performance-with-better-power-efficiency Snapdragon 855 on TSMC 7nm)

- Intel will have a 10nm later this year that is broadly equivalent to TSMC's current 7nm. They are still shipping 14nm as their leading node.

- Global Foundries have stopped further investment beyond 14nm.

NV are still on 12nm with Turing.

Unless NVidia skips 7nm altogether, AMD is more likely to take advantage since AMD is already releasing Navi on 7nm later this year.

It also remains to be seen what the yields are for 5nm. It might be the case that only small area chips like cell phone SoCs and laptop CPUs can be manufactured for a long time, as was the case with 12nm and 7nm. GPUs typically need as much area as they can get to fit more compute cores.

Intel lost its lead a long time ago. Now they are falling further behind.