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Show HN: H2 Forth CPU

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120 pointshowerj26 comments

Hi! Author here, this has been a fun side project for me, It's pretty much finished but I keep coming back to it to do one more thing.

This project is a CPU written in VHDL that executes Forth. It's based on the J1 processor, but with a few new instructions and interrupt handling.

Also included in the project is a VT-100 terminal emulator (emulator is not quite the right word here) written in VHDL, which some of you may find useful. It supports a fairly large subset of the ANSI escape sequence commands.

I originally wrote a smaller compiler for a Forth like language in C, but I've since rewritten the tool chain so the eForth image running on the target is built with a more traditional meta-compiler.

Here's a video https://howerj.github.io/h2/107.mp4 of the project running (I've since added color support to the VT-100).

If you type 'make gui-run' it should build and run the graphical emulator for the device. (or just 'make run' for the command line simulator).

You can play a little game by typing:

   1B 20 thru
   you-are-dead

I always wonder why so many projects use the MDA/VGA font. Is it that it's readily available in a HDL-friendly format?

If that's so, I'd love to translate a couple popular open source fonts. Terminus is my usual default console favorite (mostly because the bitmap x3270 font is not in a friendly format).

Yes. I really do hate the VGA font that much. ;-)

Hi! Sorry, I've been at work all day...

The VGA module on which the VT-100 is built around used that font (I am not sure of its name - I guess "MDA/VGA font" would do). That VGA module came from here: http://www.javiervalcarce.eu/html/vhdl-vga80x40-en.html.

The project actually uses Terminus by default now. That video of the system up and running is quite old, I should make a new one. You can switch between Terminus (8x12, KOI8-R) and VGA Font (Latin-0). There's space for two more fonts in the Block RAM - if you wanted to make a new you're welcome to!

The fonts are in 'https://github.com/howerj/forth-cpu/tree/master/fonts'.

I'm far less urged to translate the 3270 font (I'm a huge fan of it) if you are relying on Terminus. It'd probably be better to support other fonts DEC terminals supported. I'll dig a bit into that. :-)

That's great, raise or ticket or send me an email if you find anything useful. It's not too much work for me to convert things into a usable format if I have a BDF file (8x12 only - anything else would require hardware changes!) for the font.

I'm very fond of double width and height, but the DEC terminals implemented double width by halving the pixel clock rather than a proper font. Minitel did it right.

Could you clarify "use the lowest bit for character operations" ?

This is cool! Is it anything like the Novix NC4016 Forth CPU, or a totally different approach?

https://news.ycombinator.com/item?id=8860786

Any plans on making a radiation hardened version like the RTX2010? (Some of those are orbiting Mercury and Saturn and landed on Eros!) ;)

http://www.cpushack.com/2013/02/21/charles-moore-forth-stack...

I love the idea of a VHDL VT100 "emulator"!

How hard would it be to make a luxurious Ann Arbor Ambassador?

https://www.jwz.org/blog/2016/10/export-termaaa-60/

I actually don't know too much about the NC4016, at a quick glance it has some similarities, especially in how the instructions are encoded. The H2 runs faster - but that's more a function of the FPGA than anything I have done. I would image it doesn't cope as well with radiation than the Novix. :)

That link redirects you to an interesting image if you access it from Hacker News! From the manual for that terminal, it seems to support some of the standard ANSI escape sequences, but there would be a lot more work to make it 100% compatible.

Oops! Jamie's such a joker. Yeah, best to cut and paste that url.

I was actually interested in turning the graphics driver into something that could support CGA (like) graphics. At the moment there are no graphics modes available to the system, it's all just text. The biggest limitation is the block RAM, which only gives me 18KiB of video memory to work with. You might be able to use it to run DOS like games on it, but little more.

Disabling cross-site referrers also works - that's a sane (non-)default :)

I've been looking for an Ann Arbor Ambassador for literally 20 years!

I loved those things: 80x60, "square" fonts, long-persistence phosphors, 19,200 baud capable...

Rad hard would be achievable if this was instantiated on a suitably rad hard FPGA, which do exist for mil & space applications.

How hard do you think it would be for a software engineer who does a lot of low-level (kernel) programming to get into this? I really want to get into hardware but am unsure how to start. Do you have any tips/ideas? How long did this take you in total (number of hours) and was it something you had to learn a lot for or was it mostly within your skillset?

I have a background in electronic engineering, and did a fair bit of digital design related courses so large bits of it were in my skill-set, but mainly work with C in an embedded context. This project has been going on for years, but I only spend time on it now and again, a lot of that is rewriting sections of the code base I do not like or trying out different things.

I think the main piece of advice is persistence. Doing anything on an FPGA is much harder than doing it on CPU, but as a consequence of that the designs tend to be a lot less complex. It is not only a new language to learn, but it's a new paradigm. VHDL and Verilog might look like programming languages at first glance, but they are not. They are hardware description languages.

Also the vendor supplied tooling sucks.

For the more practical side of things, you can get a cheap development board for less than $50 that will run an open source tool-chain (see http://www.clifford.at/icestorm/), although I do not use them myself. You will want to do your research first.

One final piece of advice.

Do not ignore any warnings about latches.

Thank you for your response! I found it very useful.

Why would you rewrite from Verilog to VHDL? I've always heard that the latter is significantly less expressive than the former.

I'm a huge Verilog fan, but VHDL has a bunch of higher level features that Verilog doesn't have. E.g. records, limited range integers, enum types etc.

SystemVerilog added these kind of features much later.

That said: there are a bunch of constructs where Verilog really shines, especially when it comes to bit twiddling.

When you care about open source tool flows, it's no contest: Verilog is far ahead on that front. That's currently the deciding factor for me.

It would rock if someone wrote a VHDL frontend for Yosys. You could then use Yosys to convert to Verilog for use with all the other open source tools.

There is a link in https://github.com/YosysHQ/yosys/wiki/VHDL-frontend-efforts

Simply because I wanted to. I prefer VHDL because that's what I was taught at university, but I don't do any HDL work professionally so don't take it as a particularly informed decision.

Can anyone translate this to laymen developer terms?

What's the performance of this CPU?

The Nexys-3 board on which it runs is clocked at 100MHz, the 16-bit CPU executes a single instruction per clock cycle. I have not tried it on any new FPGAs, just on the board I have, it might run faster on a newer FPGA. It can also respond to an interrupt within 50ns (but more like 90ns with the overheads of setup in the interrupt handler).

It's not meant for high performance - but it is tiny! The program is limited to 16KiB in size, of which 6708 bytes are used by the eForth interpreter that is running on it. It's a very niche thing.

That is blazing fast for all sorts of embedded use.

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