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Comment by comboy | Hacker News Reader

This can be powerful. They don't have to build general CPU right away. Start with storage and by the time you have database boxes on ASICS designed to match your software you're already winning.

I'm surprised there's still not much effort to make FPGAs more affordable and base everything on it. With this scale it seems like it should be a win on the long run over deploying new ASICs every few years.

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Twitch (which is owned by Amazon) is rolling out VP9 video to their site for about a 25% bitrate saving over H.264. Since Twitch is almost entirely live video they needed a VP9 encoder fast enough to keep up at the quality they wanted. They found libvpx wasn't fast enough for their live video use case so they're using an FPGA VP9 encoder from NGCodec:

https://www.youtube.com/watch?v=g4HnM26Fwaw

https://ngcodec.com/news/2018/11/12/ngcodec-to-deliver-broad...

In a couple of years Twitch will start deploying AV1 streams. I imagine they'll take a similar approach for that as well.

FPGAs are much larger (read: more expensive in volume) and slower than ASICs, so if you have the unit volume and calendar time to do an ASIC and know roughly what it needs to be optimized for, FPGAs really can’t compete. FPGAs are effective for more exotic smaller-scale use cases where unit cost is less of an issue.

The CPU is the third such project that I'm aware of, also checkout their Nitro hypervisor and disk interface: http://www.brendangregg.com/blog/2017-11-29/aws-ec2-virtuali...

I know they did their own networking hardware, but I don't know if it was done by the same team that did this CPU and Nitro.

I'm pretty out of the loop here. Are there existing, widely used workloads that are critical for storage for which FPGAs are competitive with CPUs?

I'm just guessing that if the only thing that given box is doing is handling very specific internal S3 API, you can probably optimize a few things over a multi-purpose architecture.

I'm totally blue and I'll be honest - when I want to learn about something, it seems that stating some thesis gets me way more information from HN vs asking a question, especially when it turns out to be wrong ;)

This is a horrendously disrespectful way to learn about a niche area. I'm shocked to see it laid out so plainly like that.

Your first assertion here is incredibly wrong. ISA's don't split up as cleanly as your fictional version, a NAS box has to support all the same branch, arithmetic, and memory operations as a "multi-purpose" architecture. The only conceivable things you'd bolt on would be things like NEON accelerators for AES, and there's better ways to do that than mucking about with the ISA.

Do you get folks coming back for a second reply after this charade is made apparent?

Only replying to the claim of disrespect. I think the disclaimer, as included, in a post positing a thesis is not disrespectful at all. gp clearly laid out that they were not an expert but had an assumption.

I will agree though that done without a disclaimer gp would have been disrespectful.

disclaimer should have been in the first post, not a reply to a reply long after the confident assertions over what a "storage" CPU must do.

And yet, here he/she gets exactly the result they were looking for. It's a well known online trope that you get your question answered faster and more thoroughly by posting a wrong answer first rather than plainly asking. My guess is it triggers something primal in us geeks.

See: https://xkcd.com/386/

That trope is called Cunningham‘s law: https://meta.m.wikimedia.org/wiki/Cunningham%27s_Law

It's still incredibly disrespectful way to approach a community, and all of these replies ignore the thrust of my question about the expert re-upping after this ruse has been made apparent.

Comboy spread a lot of disinformation in the first post, like "I'm surprised there's still not much effort to make FPGAs more affordable and base everything on it." before the lie was laid bare. Looking forward to arguing with "FPGA experts" who harken back to that post as their primary source.

Video encoding is a good example. NGCodec makes FPGA based video encoders:

https://ngcodec.com/

Not storage, networking: https://www.microsoft.com/en-us/research/uploads/prod/2018/0...

Indeed, with networking it seems to have already happened, if I remember correctly Google also uses software defined networking based on their own hardware (not sure if FPGAs are involved)

They're definitely using miracom lanai chips for part of it at least; google engineers are the maintainers of the lanai llvm backend.

Seems odd that MS and G are the ones using special hardware, but only reach to 24 and 16 gbps respectively, while AWS hits 100 gbps networking. Is AWS already using specialized HW as well?

I'd guess the bespoke hw is not necessarily faster signaling, but rather functionality. E.g. fast multipath routing in a Clos fabric, firewalling, maybe offloading some specific workload (IIRC ms was using fpgas to offload some aspect of search for Bing)

Going back to signaling, AFAIU the state of the art is 25 Gb/s per lane, 100 Gb networking aggregates 4 of those. 50 Gb/s is still in the labs.

56Gbps serdes lanes are being used in network chips right now.

Google, along with everyone else, still uses ASIC-based networking hardware from the traditional vendors where they need the bandwidth. But full marks to their PR department for the idea they have it all solved themselves.

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