How does a company, who for decades has been 1-2 node processes ahead of the industry, suddenly gets 1-2 node processes behind everyone else.
There must be an amazing story behind this that no one seems to be digging into.
How does a company, who for decades has been 1-2 node processes ahead of the industry, suddenly gets 1-2 node processes behind everyone else.
There must be an amazing story behind this that no one seems to be digging into.
First there are 'node wars' where what it means to be a "10nm" process or a "7nm" process has become rather murky. This is because transistors themselves don't work well at these sizes and you start getting novel structures which make it hard to compare things. Back when all transistors were flat rectangles it was easier but now they all have some amount of a verticalness to them (FinFets) and there are various patents around this stuff and so nobody talks about 'transistor' size any more they talk about 'feature' size. But what is a feature? Is it a polysilicon line? (equivalent to a trace width on a printed circuit board) Or is it the smallest thing you can render with your lithography process?
But all of that explains when you step back, what has happened to Intel. It used to be that what Intel was doing in there fabs other fabs would take 2 - 3 years to do, and they were big differences, like copper, or finfets, or smaller feature sizes. But as time goes on, the features get harder and harder to develop so when you're two years behind the difference appears smaller and smaller.
What is more the cost of trying something that doesn't work out is more and more expensive and time delaying. And costs are huge here.
That introduces part three of the puzzle, as fabs have been closed while companies switch to using TSMC we have gone from having a dozen semi-conductor companies spending their R&D budgets on their own process improvements in competition with Intel, to those dozens of companies sending their R&D dollars to TSMC who then in aggregate can spend more on R&D than Intel does while still being profitable enough.
So the bottom line is that the market has settled out and there are just few giant foundries (Global, TSMC, Intel, Samsung, Etc.) and one of them doesn't make a business out of others use of their equipment (Intel). Worst, the biggest consumer of silicon has become phones and Intel isn't a serious player.
Intel is under siege and I think they know it (they certainly act like they know it).
And it was mostly about the standard "experience curve", i.e. the fact that larger volumes being manufactured generally lead to better results ?
But why did they have such a role is still an interesting question.
From an organizational dynamics point of view it really shows the value of process as a means of preserving institutional integrity and durability, but we're humans and communities change. So companies change, some employees leave, some new ones show up, and the mix may not be as effective as the previous mix in getting stuff done.
I really admire Dan Warmenhoven's management philosophy which was very low politics. People serve their ambition in one of two ways, by lifting up the community around them or by pushing everyone but themselves down. The latter type destroy companies and senior management's role is to be the antibody that detects and then removes the offending folks.
So you need to build a healthy community of employees who are working toward lifting the company further. The people who do that, and the community itself, however move on eventually, and the special quality of the group can erode over time.
Is there a book about it ?
For an analogy, a GHz is a GHz everywhere but that doesn’t mean a 3GHz CPU is always faster than a 2GHz CPU.
In reality, size of various features in a CPU differ widely. Intel 10nm could have a transistor gate pitch of 50nm, while TSMC 7nm could have a pitch of 60nm. All the meaningful parts you care about, like size of the transistor components and interconnects, are _not_ small, and it every company designs their own tweaks on these building blocks for reliability/manufacturability/performance/power/etc.
For example, a typical metal pitch on the low metal layers is 40nm, meaning you get one wire every 40nm, or 25 wires in parallel in a 1um channel.
What Intel is calling 10nm does indeed appear to be close to the others' 7nm. Then again, Intel is seriously behind on 10nm, so the bottom line remains the same: they seem to have essentially lost their process advantage.
How about a number that actually relates to the performance and can be measured?
When the foundry sends you a design kit which contains all their design rules and tooling around a process, then this process has some codename that appears everywhere (think filenames, names of library elements, and so on). This codename tends to be something like GF14 (for GlobalFoundries' 14nm) or N7 (for TSMC's 7nm) plus cryptic suffixes for different revisions of the foundry process.
So the 14/12/10/7nm terms are actually part of the design engineers' everyday work flow. They just also filtered through to marketing for whatever reason.
I could imagine that at some point in the future, foundries will switch to a year-based versioning similar to what happened with a lot of software. So you'll have a GF2027 process and so on. That's pure speculation on my part though, and inertia is definitely a thing.
SRAM bitcell, High-Density (HD)
A Intel 14nm: 0.064 µm²
B Intel 10nm: 0.0312 µm²
C TSMC 7nm: 0.027 µm²
A is what most current intel chips use, B is in limited production. C is what AMD will be using in 2019Whatever metrics are used, they are stuck on it for way longer than they should.
Let's just assume they are both equal in absolute terms. By Late 2019, Intel would have barely launched 10nm and possibly shipping in 30 - 50M quantity ( And I think even that is an optimistic number ). TSMC wold have shipped more than 300M 7nm across their entire 7nm generation.
And TSMC has 5nm ready in 2020. I don't think Intel will have their EUV 7nm ready even in 2021.
Combined with the fact there is exactly only ONE, one EUV equipment maker on the market, ASML. And they have limited capacity in producing these ASML machine. As far as I am aware all of the 2018 and 2019 capacity are already locked to Samsung and TSMC.
https://semiaccurate.com/2018/06/29/intels-firing-of-ceo-bri...
1.https://betanews.com/2005/07/13/suit-intel-sabotaged-compile...
2.https://www.techspot.com/article/1722-misleading-core-i9-990...
Now AMD is (rightfully?) pulling ahead.
Moving ahead gets much harder the more you advance, so it may even be that Intel still has a 20 month lead from AMD, but since it is so much harder to move, the same lead becomes a small difference.
Its easy to point to the big player and say they lost their lead, but the fine details about who made decisions to land them there is the story we want told.