Normally an SSD has an on-board flash controller that communicates something like NVME or SATA to the host and a protocol like CFI to the actual NAND chips, it will also map from disk blocks (OS unit of storage) to NAND columns and cells using an internally stored table. These chips do a lot of other mundane things like wear leveling for NAND, clearing written cells, etc. If the T2 is taking the place of this controller and communicating directly with the NAND chips it would be at best duplicative of an external SSD controller and at worst completely incompatible.