Don't worry. The compiler will figure it out. And this time the compiler will have AI™.
> the killer is that dead silicon tends to be a LOT of silicon for any given program
Part of the idea here is that the cost dynamic has changed. Silicon is cheap compared to power so even if you have lots of chips not being used at any given time as long as they can be fully powered off total system cost (capex+opex) is still better.
> why it would work this time
The difference is scale. If you are running millions of CPUs and adding 100k's per month then something like this could work, assuming the AI™ magic that figures out which new chips to build.
Intel is talking up their grandiose vision but practically this is the same as AMD's chiplets on active interposers (https://spectrum.ieee.org/tech-talk/semiconductors/design/am...).
The physical technology is real and probably coming soon but it will be limited to incremental improvements to the existing CPU/GPU compute architecture from increasing bandwidth and decreasing latency until the magic compilers arrive.