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Comment by garmaine | Hacker News Reader

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garmaine·

(1) How would you make it? Photo masking is an inherently 2D process. That's why 3D chips are stacked wafers.

(2) How the heck would you cool it?

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(2) 4D heatsinks.

Just fold the heat into another dimension

You design it ticker at the moments the computer will be using more power, and thinner at the rest of the time.

paraboloid etching

(2) you run it twice as slow, but compensate it with the fact that now you have 2x the amount of devices

And you look at Amdahl's Law and realize that your 3D chip literally can't be better in performance than your 2D one if you do that.

Interesting standpoint. The current issue with very large pipelines, besides the obvious issue of keeping them IO satiated, is the distance in between branchings in code. In other words the degree to which extend you can "flatten" the computation timewise.

Now imagine, thanks to 3D cells, you now magically get double the number of registers. How much efforts do you think you need to spend to double the amount of loops running in parallel?

1) 3d printing uses 2d slices. Hell SLA is a photomask too.

2) I seem to remember IBM was looking at microfluidics for both power and heat distribution, like our blood.

3D printing is additive. Not sure what SLA is?

I would love to see the microfluidics cooling. I wonder what would happen if you reached boiling though--it'd probably explode the chip.

In this context, SLA = Stereolithography

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