Yet here we are.
Yet here we are.
Once you have a decent base and sufficient interest, peoples incremental changes will get there eventually.
The size of a viable increment in a software project is much smaller than it is in a hardware project. Developing a functional, non-trivial microarchitecture requires significant capital expenditure and coordination of efforts. This requires at least a patron of some sorts to manage the process, where the requirements for that patron are much more significant than "somebody with a listserv".
Once those players front the money for the ecosystem the incentive to coordinate is there on the fab side. With that in place and good simulation possible, the size of an incremental change is an exercise in release management.
You don't get high volume processor core into silicon by just hacking Verilog/VHDL in your computer and then send it to the foundry for tape-out and manufacturing like you do with some custom ASIC chip.
Intel and AMD start new microarchitecture design work every 2-3 years. The work must progress in tight time schedule or it becomes outdated. It's highly coordinated effort that requires significant capital investment.
You have to lock in goals, select implementation technology, methodology, have expensive tools etc. Behavioral design, physical design and silicon ramp interact constantly. Problems are solved and there are many optimization and validation phases. You need expensive hardware and access to engineers in the foundry and process you are targeting.
I'm sure there will be many completely open RISC-V cores, but not for the high volume uses or latest processes.
Intel and AMD start new microarchitecture design work every 2-3 years because (Intel, at least) base their sales on offering the latest and greatest. They seek peak performance, which is exactly what gamers/scientists/prosumers want.
But for large swaths of the market, you don't need that. Think of your average consumer/small business owner. By and large, most of them are using 3-5 year old PCs, and even then the processors within those 3-5 year old PCs were probably last-gen when they were purchased.
Or think military -- the ability to have a home-grown, openly-vetted processor that you can tape out with a trusted domestic supplier would eliminate a number of security concerns.
Don't let great be the enemy of good here. If you can build a decent RISC-V core that can compete with an Intel Core 2 Duo, you've got all the horsepower you need for the average consumer.
caveat of course: the L1/L2 cache power consumption isn't included in that figure, but, crucially, with the Compressed Instructions reducing cache misses by 20-25% that's equivalent to having approximately double the I-cache size.
basically by a fresh start they're on to a winner.
> Think of your average consumer/small business owner.
Optimizing processor for low-cost price is also very demanding.
With hardware, someone, at some point, is going to have to pay to press those chips into real silicon.
And if open source processors feature the same attention to detail and high engineering standards that most open source software projects evidence, they’ll frequently catch on fire or stop working without multiple bug fix patches.
I'm saying that much linux development nowadays is done far away from actual deployment, just like open source cpu design would be.
Also, it's often paid and driven by companies who have an interest in the existence in these open platforms, so it's not all just based on generosity (and we do see companies are interested in RISC-V cpus).