That looks like things will begin getting bigger again in a few years?
That looks like things will begin getting bigger again in a few years?
""" TSMC plans to introduce a second improved process called 7nm+ a year later, which will introduce some layers processed with EUVL. This will improve yields and reduce fab cycle times. The 7nm+ process will deliver improved power consumption and between 15-20% area scaling over their first generation 7nm process. """
[0] https://en.wikichip.org/wiki/7_nm_lithography_process
update: link
- 7nm has have very limited extreme ultraviolet patterning on larger features of the chip
- 7nm+ will have significantly more EUV patterning which will allow shrinking some stuff that wasn't for 1st process iteration because yields would be too low - should have slightly higher density, possibly higher clocks/lower power draw.