Its always the same set of problems. FPGAs take too long to synthesize, place and route. Not much internal visibility or its not trivial to dbeug. not enough capacity as chips are becoming bigger and bigger.
> Its always the same set of problems.
Nope. Did you read the article?
No. Its paywalled. But I work on making Emulation systems for a living. So, I know this for a fact.
smilekzs below has provided us with a workaround
There is a small PDF button that lets you read the article. And you are correct, nothing new in that article.
Don't think the small PDF button works. It's paywalled.
Paywalled.
Scihub has it (DOI: 10.1145/3177540.3177542)
Why even post this if the article has to be purchased?
I hate paywalls as much as anyone else, but it's just too common with papers to restrict HN to free only, however you can use scihub easily enough... the latest GDPR geoblocked newsites on the otherhand are very unwelcome.