To significantly reduce power consumption you need improved process and this is where smaller nodes are so important, because they are currently the only really viable way to significantly reduce power consumption.
I think the cost and complexity of advancing lithography processes has increased so much that the technology risks have increased dramatically. Some foundries may blunder relative to others.
Intel has abandoned their tick–tock model for Prosess-Archictecture-Optimization. In retrospect it seems clear that they knew that 10nm process is risky step and it's impossible to predict when it's ready.
Now it's more like Process-Archictecture-Optimization-Increased Clock Speed And Power Consumption-We Don't Know What We're Doing Anymore
Also, you're right about the complexity. Intel's 10nm process is likely far more complex (more steps) than Samsung's 7nm EUV process, or even TSMC and GloFlo's 7nm DUV processes, which is why it's taking them so long.
In retrospect, Intel becoming a "manufacturer for ARM chip companies" seems laughable now, doesn't it?