Intel Launches Stratix 10 TX: Leveraging EMIB with 58G Transceivers
anandtech.com
anandtech.com
G here should mean Gbps, it's a technical description not a marketing term. Either the transceivers can be configured for 29GHz PAM4, or they can't, I don't see how there's room for interpretation here.
> up to 144 transceiver lanes with serial data rates of 1 to 58 Gbps
And the Altera website agrees: https://www.altera.com/solutions/technology/transceiver/over...
FPGA's usefulness as an accelerator in DCs was hugely hampered by IO bottlenecks. Even PCI-E can be said to be limiting the theoretical peak throughput of top FPGAs. With more IO being done by physical hardware, this should offset IO bottleneck somewhat.
I'm still waiting for FPGA on package Xeons that will have raw register to register linkage connection. They were once announced in 2016, some samples were shown, but then they went silent.
Intel used to both design and manufacture their own line of ARM SOCs back in the 2000s under the XScale brand, but they sold it to Marvell in 2006.
But the idea is that the ARM cores normally just act as your "control plane" -- manage the FPGA, watch power usage, reload configurations, monitor & reporting metrics, etc etc. So they aren't the main attraction, of course.
In the long run, Intel will be moving to discrete PCIe FPGA cards for data center usage, as well as fusing the FPGAs directly on-chip, alongside the Xeon cores for extremely high-end stuff. That's where you'll find products like Stratix 10 (aside from a few other places.) So in datacenter-oriented offerings, you may not see the ARM cores floating around that much.
As I understood intel has the best FABs. About half the advantage over AMD lies purely in the production technology. ARM is said to be more energy efficient than x86. Yet, when intel makes ARM chips you don't hear them outperforming everything else. I wonder why.