Maybe I'm just blind, but I can't find a link to the paper in the press release. Not that I would understand the hardware-specific parts, but I was just curious what software implementations they benchmarked against and how their elliptic curve algorithms were implemented.

I guess research chips like those end up serving as inspiration for the CPU designers of Intel/AMD/ARM etc. to evaluate which encryption instruction sets might be good to include in the future? Or are the fast vectorized multiplication operations and such already good enough to implement fast asymmetric crypto and no specialized instructions similar to AES-NI are needed? (Though of course this paper seems to imply that specialized hardware is useful)