Virtex UltraScale+ FPGA Augmented with Co-Packaged – Community Forums | Hacker News Reader

Virtex UltraScale+ FPGA Augmented with Co-Packaged – Community Forums

forums.xilinx.com

23 pointsrbanffy27 comments

This post is sort of timely for me to rant and share with the HN community. I'm a hobbyist with FPGAs .. been fooling around with Altera parts for over a year. I finally got my first Xilinx part and wow .. at least a part of the company doesn't seem to give a shit. The part I got was a spartan 6 on a Papilio Pro board. The Papilio community are awesome but shame on Xilinx. They provide the Win 10 version of ISE Design Studio inside a freakin VM!!! I couldn't believe it when I saw it. Whoever green lit this has just stopped caring IMHO. I wasted 3 hours of my life getting a hello world style program to run. Imagine running a linux vm inside a Windows 10 box to work with an embedded device :( :( If this is how Xilinx treats old parts, I'm staying with Altera parts in the future. Personal opinions yada yada.

Xilinx doesn't want you developing new designs with the 6 series. The VM is really only for people updating old designs. Get a 7 series or later part with Vivado and your life will be significantly better. Having used both Vivado really is a lot more efficient.

I wish the Ultra-scale devices did not cost an Arm and a Leg. Although, I only personally have a couple designs that could come close to using the amount logic they provide.

Although, 8GB of HBM could do some nice things. Also the UltraScale+ plus are one of thew few FPGAs capable of 1 GHz sequential logic for quite a few designs. So you could probably get a lot of performance for some signal processing or compute.

F1's on AWS are I think ultrascale+, though I don't know how fast Amazon actually lets you drive them.

There are a few different available clocks, each in different configurations (you always get a set of clocks, really), but you can get up to a 500Mhz clock out of them for specific clock lines from a specific configuration, with that particular configuration backed by a 250mhz "main" clock as well.

Do they let you use the clock management tiles or are they all tied up? With those you should be able to generate whatever clock you want.

No, at least not directly with the way the HDK is set up out of the box; there are "Clock Recipes" you choose from at build time, and a recipe is just the pre-canned configuration. 3 different groups, each one with a chosen (single) recipe, each group giving you a few clocks of various frequencies.

The clock recipe is examined as part of the "AFI Manifest" when Amazon creates FPGA images you can load, so I doubt you can go out of the way very much, here.

https://github.com/aws/aws-fpga/blob/master/hdk/docs/clock_r...

https://github.com/aws/aws-fpga/blob/83c80efd30862d862ea8f99...

Depends on what you mean by arm-and-leg but, you can get an UltraScale+ Zynq (with carrier) for ~$800 USD from Avnet. It's low grade enough (XCZU3EG) you don't need a Vivado license: http://microzed.org/product/ultrazed-EG

Xilinx has the lower/mid scale FPGA market fairly locked up in terms of licensing and available boards, I think, outside of a few niche Intel offerings (DE10 Nano is quite good).

But you aren't going to get anything close to on-board HBM2 without spending north of $10k USD, or something.

Mods: please fix the severely broken title, thanks.

Also: that looks scary! Didn't see a price, is $nnnn enough? Whoa.

$nnnnnn Probably north of $100k each unless Xilinx discounts them for high volume purchases.

Yeah, as far as I can tell, on a lot of these products volume discounts can easily be in the 95%+ range.

They mention that the applications are in high performance compute - so what could one do with an extremely powerful FPGA in a server?

Accelerate the most demanding tasks of your server's workload. Crypto, audio/video encoding, compression, database lookups, neural network training, computational fluid dynamics, numerical mathematics, high frequency trading etc.

I hear this a lot, but every time I try to implement a specific algorithm (in crypto, compression, and ML so far), I find that a GPU practically beats the FPGA on every metric but power, especially total cost. No matter how nicely the problem seems to map to an FPGA, GPUs start from such high performance that I can't seem to beat them- the one exception so far being some genomic algorithms.

Are there any really good papers, projects, or products that show where FPGAs provide a major commercial benefit over a GPU?

a few arbitrary data points:

* http://jaewoong.org/pubs/fpga17-next-generation-dnns.pdf

* https://www.researchgate.net/publication/284691714_The_battl...

Thanks for these!

The first paper is actually one I've spent a significant amount of time trying to use, to the point of collaborating with one of the authors. His conclusion was that FPGAs used to be competitive with GPUs for approximated nets, but the Tesla GPUs were such a jump forward in practical network performance that it wasn't worth trying to compete outside specialized realms like binary nets.

The second paper was interesting- I can imagine why the problem they are trying to solve would be a good fit for FPGAs. However, I'm suspicious that they implemented an entirely different algorithm on the FPGA, and didn't measure the performance of that algorithm on GPUs. I'm all for using the best algorithm for the hardware, but I worry they just used an overall better algorithm on FPGAs and conflated the results.

> However, I'm suspicious that they implemented an entirely different algorithm on the FPGA, and didn't measure the performance of that algorithm on GPUs.

I agree this was a bit suspicious. It may be the case that the different algorithm they used for the FPGA would have done well on a GPU -- or perhaps more likely, that if they spent a similar amount of effort in rethinking the algorithm just for the GPU, ending up with a third GPU-specialised approach, perhaps that would have done dramatically better.

Pragmatically, it seems like they chose the GPU for their application anyway - so they had already decided the GPU was the overall winner without needing to improve it.

> Are there any really good papers, projects, or products that show where FPGAs provide a major commercial benefit over a GPU?

A couple applications that come to mind:

- RF, including cellular base station hardware and radar

- ASIC prototyping

- Low production run computer hardware, including some RAID controllers

These all seem fair- I've been mostly looking at large scale FPGAs in a data center, a la F1 or Microsoft's Catapult. I hadn't given much thought to use as low-run hardware, at which I'm sure they excel.

High-end AV equipment like mixing consoles often use FPGAs alongside or instead of discrete DSP chips. The application demands sub-millisecond latency and deterministic performance but is too niche to justify spinning an ASIC.

IMO, those are the main factors that justify FPGA selection - low latency and hard real-time performance. I understand that military and industrial designers make extensive use of FPGAs for these reasons; the throughput isn't necessarily any better than an ordinary processor and the cost is drastically higher, but you have absolute certainty about latency.

They have a pretty stable niche in high volume signal processing because they can deliver deterministic real time processing for data. You'll find an FPGA in most oscilloscopes, digitizers and the like. A GPU would be not be well suited to that use.

I see the appeal here, but I'm surprised a good DSP or mid-volume, old node ASIC isn't the more common solution here. Do these need such specialized processing that FPGAs make economic sense?

Scopes and other digitizers can operate at GHz rates and something like an FPGA can interface those rates (JESD) with other peripherals like memory. (for example)

Scopes and digitizers are actually extremely demanding in terms of throughput, plus they do a lot of specialized processing on the samples. Even mid-range models are using top-grade FPGAs and custom ASICs. Keysight's mid-range scope is capable of 5 gigasamples per second at 8 bit sample depth on 4 channels, that's 20 GB/s of data that needs to be processed, [soft] real time.

Regarding cost, these are expensive, complicated instruments. A bottom of the barrel oscilloscope costs $300 and professional grade units are more like $2-3000. The top grade ones can cost half a million dollars ( https://www.keysight.com/en/pcx-x205212/infiniium-z-series-o... ).

Have you heard of Microsoft's distributed FPGA fabric project? They are using acceleration for a lot of Bing's algorithms with excellent result all around. They are now working on bringing it to Azure.

That's Catapult, right? I have read through some of their papers. It sounds like they might be offloading some network work onto the FPGAs in the same way AWS has their custom nitro card, but I've not really been impressed with their attempts at data processing improvements (some reason for me to use it on Azure). I haven't read all of their papers, but what I have read always sounded like an after the fact justification for the FPGAs. They might show the FPGAs are better at a machine learning task than CPUs, but unless you were deciding whether to use FPGAs you already have, the real competition is GPUs and they tended not to compare to a GPU.

Do you have a recommendation for a specific data processing experiment of theirs I should check out? I really feel like I just missed a paper where they proved some real advantage over other hardware, and once I found that I'd understand. I respect the Azure teams generally and assume they know what they're doing- but can't escape the hunch that what they are doing is network acceleration, and are just releasing to the public cloud because they have these sitting around anyway.

So an FPGA has an area to speed trade off. So if you use a lot area things are generally quicker. The main reason is an FPGA has really fine grain parallelism. A GPU might have ~2000 simple cores. If you consider one these Ultrascale+ FPGAs likely have have over a million logic cells. The one in this post has 2852K logic cells. So if we were computing just basic logic we have over 1000 times more parallelism than the GPU. However, most problems are not basic logic, and the FPGA does not have enough IO pins for that unless we combined the results. It also excludes built ins like adders, DSP cells ect... However, that's the general idea fine grain parallelism.

So if your looking for a solution that will perform faster on FPGA you are going to want something that is simple but you need compute often. That way you can duplicate it 1000s of times on the FPGA. An other place an FGPA excels is data that quite long. Compare 32 bit number to 1024 bit number. You could do what ever your doing to the 1024 bit number in one pass with an FPGA. However, the GPU's native int size is probably 32 bits. So to just perform one operation the GPU has to perform at least 32 operations for that one number. So that overhead has to be carried around for every operation a GPU core would have to perform. The HBM added to this FPGA makes it even better in cases like this. That's just the general idea though.

So if what you are doing can take advantage of the FPGA's strengths you could come out with a much faster solution. Also there is power usage. If your going to be building clusters to perform what ever processing you need and the FPGA performs about the same as GPU you will use less electricity.

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