Momentum builds for open-source processors (2001)
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here's the really interesting thing: i've been in touch with the head of the shakti team, madhu, and he tells me that the Indian Govt has basically given him CARTE BLANCH to design processors for primarily the indian market but also world-wide distribution.
the "catch"? due to Intel getting into bed with the NSA, the entire chip and its associated source code MUST be entirely libre, right down to the bedrock.
funnily enough, i don't have a problem with that... do you? :)
so in discussions with him last week (he is very busy on a tape-out deadline at the moment), he said that he would be happy to offer the open hardware community free access to the university's 180nm fab, to be able to do proof-of-concept testing, and that he also wants to make available his team and expertise to create an entirely libre RISC-V multi-core SoC. i have done a preliminary design here: http://rhombus-tech.net/riscv/shakti/m_class/
various foundries have offered free MVP samples, and various other companies have offered free access to tools that normally cost USD $80m to license. this on the basis that the Indian local market is so... INSANELY LARGE that they recognise that they will make literally billions of dollars over the next few years.
so it's getting very interesting.
With silicon scaling laws getting walls, Intel's ability to have an efficient general purpose CPU for every workload is fading. The only way to provide better performance is to provide specialization, now.
Processing will specialize in the following:
* databases: SQL projections in special hardware data slicing CPU instructions. Hardware-accelerated hashing, sorting, filtering.
* dynamic languages: Special code caching for JITted code. Memory models that won't have to be emulated. Memory barriers and copy on write to help the GCs do the work.
* AI: We're already seeing this with Google's TPUs: Low precision tensor operations. We're going to see more specializations inside this segment too. Tensorflow today has CPU, GPU and TPU backends. In a stable high volume configuration such as vision for an autonomous car, why not provide a fourth backend for a Tensorflow pipeline: VHDL/Scala?
* IoT/Sensors: Extremely low power modes, on-chip LoRa.
* Network: this is already happening with microsoft using FPGAs to help do the routing. Once settled, some use cases will have their silicon edition.
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This will lead to a thining of the margins of Intel, NVidia and ARM, to the fragmentation of the monopolies, and less money will go to the lawyers.
I'm kind of excited to try something new in a way that I haven't been for a few years, so there's that, too.
So let's say your team has what it takes to design and validate the HDL for a processor microarchitecture that implements some un-encoumered ISA with performance that is attractive and a sufficiently short errata list. Then published the HDL under some free-as-in-speech license. You still have to get gcc, llvm, and gdb to support you, at a minimum. And then you want the hardware debugger people to support you. They will support you if you get enough users, if you get enough support from tool makers you will get users. The trick is not running out of money before the ecosystem spins up and your competition releases a more attractive core.
(having done this ....) getting gcc/gdb/linux/etc working for your new architecture is something you will have done long before release your gates - both on your architectural simulator and you've probably booted linux at least once to a prompt on your gates (or at least HDL)
I've been on both sides, I found bugs in the original 29k bringing up unix (pre-linux) on the architectural simulator that were in the real chip, and as a logic designer helped design a new CPU and bring up linux on it
Anyone who seriously has a new CPU already has that ecosystem in place at the point they announce their CPU (and is probably busy trying to push their changes upstream to the gcc/llvm/glibc/uboot/linux/etc trees the day they announce to prove they are real)
But I agree the trick is to not run out of money ....
OpenCores seems to still exist as does a relatively recent (2015) splinter LibreCores/Free and Open Source Silicon Foundation (FOSSi). Wikipedia says OpenCores was always a commercial organization; maybe it was not entirely clear how other commercial entities could relate? OpenCore's OpenRISC is LGPL/GPL which could have further put off commercial entities (whether it should have or not)?
There's an associated annual conference https://orconf.org/ which seems to be about any open chips topic now, unsurprisingly including several RISC-V talks last year.