I don't know for which processors Intel and AMD plan to release microcode updates.
What would that entail? Disabling speculation completely? Disabling memory accesses during speculation?
The "out of bounds" Spectre variant is still feasible.
Also: What about hyperthreads? It seems to be many people's assumption that the BTB is shared within a physical core.
For code running in user mode, you flush the branch predictor on each context switch---again, new microcode + patched OS.
Hyperthreads are tricky. Those are not yet fixed by microcode AIUI, and in the future you may want a usermode program to say "I don't want indirect branch prediction because I am afraid of what the other hyperthread might do to me". That would require some new system call (like a new prctl on Linux) or something like that.